NDLI: The effect of emitter diffusion formation methods for laser doped selective emitter silicon solar cells

Content Provider	IEEE Xplore Digital Library
Author	Jisoo Kim Kyeong-Yeon Cho Eun-Joo Lee Keun-kee Hong Hyun-Woo Lee Ji-Myung Shim Dong-Joon Oh Jeong-Eun Shin Ji-Sun Kim Jae-Keun Seo Soo-hong Lee Hallam, B. Wenham, S. Hae-Seok Lee
Copyright Year	2012
Description	Author affiliation: R&D center, Solar cell division, Shinsung solar energy, Seongnam-Si, Gyeonggi-do, 463-420, Korea (Jisoo Kim; Kyeong-Yeon Cho; Eun-Joo Lee; Keun-kee Hong; Hyun-Woo Lee; Ji-Myung Shim; Dong-Joon Oh; Jeong-Eun Shin; Ji-Sun Kim; Jae-Keun Seo; Hae-Seok Lee) \|\| Department of Electronic Engineering, Sejong University, Seoul, 143-747, Korea (Soo-hong Lee) \|\| School of Photovoltaic & Renewable Energy Engineering, University of New South Wales, Kensington 2052, Australia (Hallam, B.; Wenham, S.)
Abstract	In this paper we represent three different methods of forming a lightly doped emitter for the fabrication of laser doped selective emitter solar cells on a pilot production line at Shinsung Solar Energy which effectively result in a single-sided diffusion. All the 6 inch samples suffer from low J compared to the 5inch sample due to a different plating ratio is between the 5 inch and 6 inch cells. We optimized the front electrode process by plating achieving an efficiency of 19.2% on a 6 inch solar grade p-type CZ wafer.
Starting Page	002178
Ending Page	002181
File Size	777627
Page Count	4
File Format	PDF
ISBN	9781467300643
ISSN	01608371
e-ISBN	9781467300667
DOI	10.1109/PVSC.2012.6318028
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Resistance Coatings Annealing high efficiency laser doping selective emitter Shinsung plating
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Control and Systems Engineering Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in