NDLI: Development of a radiation hard CMOS monolithic pixel sensor

Content Provider	IEEE Xplore Digital Library
Author	Battaglia, Marco Bisello, Dario Contarato, Devis Denes, Peter Doering, Dionisio Giubilato, Piero Kim, Tae Sung Lee, Zonghoon Mattiazzo, Serena Radmilovic, Velimir
Copyright Year	2008
Description	Author affiliation: Lawrence Berkeley National Laboratory, CA 94720, USA (Contarato, Devis; Denes, Peter; Doering, Dionisio; Kim, Tae Sung; Lee, Zonghoon; Radmilovic, Velimir) \|\| Department of Physics, University of California, USA (Battaglia, Marco) \|\| Istituto Nazionale di Fisica Nucleare, Sezione di Padova, I-35131, Italy (Bisello, Dario; Giubilato, Piero; Mattiazzo, Serena)
Abstract	This paper presents the design and experimental test results of a CMOS monolithic pixel sensor prototype with an optimized layout of the pixel cell aimed at a superior radiation tolerance. The chip implements transistors designed both with and without Enclosed Layout Transistor (ELT) rules, and different optimizations of the charge collecting diodes. Irradiations up to a total dose of 1.1 MRad and single particle detection tests have been performed with 200 keV electrons in view of the utilization of such a sensor in Transmission Electron Microscopy (TEM) applications. The sensor response to high-momentum particles was tested on a 1.5 GeV electron beam. The chip radiation tolerance was also assessed against a 2 MRad total dose of 29 MeV protons and against 1–14 MeV neutron fluences in excess of $10^{13}$ n $cm^{−2}.$ These tests show an improved performance of pixels with ELT transistors, a thinner oxide on top of the diode surface and guard-rings around the diodes.
Starting Page	3501
Ending Page	3504
File Size	2467760
Page Count	4
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4775091
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Design optimization Diodes CMOS image sensors Laboratories Transmission electron microscopy Optical imaging Prototypes Performance evaluation Electron beams
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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