NDLI: Design of an FPGA based algorithm for real-time solutions of Statistics-Based Positioning

Content Provider	IEEE Xplore Digital Library
Author	DeWitt, Don Miyaoka, Robert S. Xiaoli Li, Lockhart, Cate Lewellen, Tom K. Hauck, Scott
Copyright Year	2008
Description	Author affiliation: University of Washington Department of Electrical Engineering, Seattle, 91895 USA (Hauck, Scott) \|\| University of Washington Department of Physics, Seattle, 98195 USA (Xiaoli Li,) \|\| University of Washington Department of Radiology, Seattle, 98195 USA (Miyaoka, Robert S.; Lockhart, Cate; Lewellen, Tom K.)
Abstract	We report on the implementation of an algorithm and hardware platform to allow real-time processing of the previously described Statistics-Based Positioning (SBP) method for continuous miniature crystal element (cMiCE) detectors. The SBP method allows an intrinsic spatial resolution of ∼1.4 mm FWHM to be achieved using our cMiCE design. Previous SBP solutions have required a post-processing procedure due to the computation and memory intensive nature of SBP. This new implementation takes advantage of a combination of algebraic simplifications, conversion to fixed-point math, and a hierarchal search technique to greatly accelerate the algorithm. For the presented seven stage, 127×127 bin LUT implementation, these algorithm improvements result in a reduction from $≫7×10^{6}$ floating-point operations per event for an exhaustive search to $≪5×10^{3}$ integer operations per event. Simulations show nearly identical FWHM positioning resolution for this accelerated SBP solution, and positioning differences of ≪0.1mm from the exhaustive search solution. A pipelined Field Programmable Gate Array (FPGA) implementation of this optimized algorithm is able to process events in excess of 250K events per second, which is greater than the maximum expected coincidence rate for an individual detector. In contrast to all detectors being processed at a centralized host, as in the current system, a separate FPGA is available at each detector thus dividing the computational load. These methods allow SBP results to be calculated in real-time and to be presented to the image generation components in real-time. A prototype hardware implementation has been tested, limited to 4 stages due to memory limitations of the initial prototyping board. A custom board is currently under development to allow implementation of the full seven stage algorithm.
Starting Page	5029
Ending Page	5035
File Size	4640052
Page Count	7
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4774370
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Field programmable gate arrays Detectors Hardware Acceleration Prototypes Spatial resolution Table lookup Sensor arrays Event detection FPGA Continuous crystal PET detector
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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