NDLI: P-stop designs for reducing electric field strength at implant edges

Content Provider	IEEE Xplore Digital Library
Author	Unno, Y. Ikegami, Y. Kohriki, T. Terada, S. Hara, K. Yamamura, K. Kamada, S.
Copyright Year	2008
Description	Author affiliation: Institute of Pure and Applied Sciences, University of Tsukuba, Ibaraki 305-8571, Japan (Hara, K.) \|\| Solid State Division, Hamamatsu Photonics Co. Ltd., Shizuoka 435-0051, Japan (Yamamura, K.; Kamada, S.) \|\| IPNS, High Energy Accelerator Research Organization, KEK, Tsukuba, Ibaraki 305-0801, Japan (Unno, Y.; Ikegami, Y.; Kohriki, T.; Terada, S.)
Abstract	In designing the radiation-tolerant silicon microstrip sensors, the onset of microdischarge must e expelled above the maximum operation voltage. The difficulty is enhanced in the n-in-p sensors, with the existence of p-n junction in the n-strips and the existence of p-stop structures. The device simulation program enabled to understand the electric fields in detail and to optimize the design to be robust against the microdischarge. The potential of the p-stop is the fundamental. In the common p-stop structures, the narrowest p-stop width has the shallowest potential and generating the least electric field strength (Emax). The potential of the split p-stops near to the n-implant in the combined p-stop does not have a potential closer to that of the n-implant. The symmetric location of p-stop has the least Emax. The Emax increases as the strip pitch decreases less than 80 microns but stays the same as the pitch widens larger than 80 microns. The onset voltage of Punch-thru protection (PTP) is governed by the gap between the n-implants, N-N gap, even with the existence of p-stop in between.
Starting Page	2507
Ending Page	2512
File Size	7733627
Page Count	6
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4774864
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Implants Silicon Strips Voltage Large Hadron Collider Microstrip P-n junctions Design optimization Robustness Nuclear and plasma sciences
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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