NDLI: Dead time correction in the DP5 digital pulse processor

Content Provider	IEEE Xplore Digital Library
Author	Redus, Robert H. Huber, Alan C. Sperry, David J.
Copyright Year	2008
Description	Author affiliation: Amptek, Inc., 14 DeAngelo Dr, Bedford, MA 01730 USA (Redus, Robert H.; Huber, Alan C.; Sperry, David J.)
Abstract	All X-ray and gamma-ray spectroscopy systems exhibit pulse pile-up and dead time losses arising in the signal processing electronics. To accurately determine the true incoming count rate and spectrum, one must determine and correct for these losses. Many correction methods were developed using analog shaping amplifiers and multichannel analyzers, providing the concepts and terms traditionally used to describe these losses and correction factors. Digital pulse processors have a much higher throughput due to fundamental differences in their deadtime and pile-up characteristics. They also permit improved variations of the traditional correction methods. This paper will highlight key distinctions between analog and digital approaches, the implementation used in Amptek’s DP5 digital pulse processor, and show measured results. The DP5 was designed to support Amptek’s silicon drift diodes, operating at input count rates up to $10^{6}$ $s^{−1}$ at a peaking time of 0.6 μs with an accurate determination of input spectrum and count rate. Several different deadtime correction algorithms and pile-up rejection algorithms were tested for the DP5 and their measured performance will be presented.
Starting Page	3416
Ending Page	3420
File Size	1631463
Page Count	5
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4775075
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Pulse shaping methods Pulse measurements Pulse amplifiers Shape Spectroscopy Tail Signal processing algorithms Finite impulse response filter Logic Nuclear and plasma sciences
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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