NDLI: A very low power and low signal 5 bit 50 M samples/s double sampling pipelined ADC for Monolithic Active Pixel Sensors in high energy physics and biomedical imaging applications

Content Provider	IEEE Xplore Digital Library
Author	Dahoumane, M. Bouvier, J. Dzahini, D. Martel, L. Gallin Lagorio, E. Hostachy, J-Y. Hu, Y.
Copyright Year	2008
Description	Author affiliation: Institut pluridisciplinaire Hubert Curien (IPHC), 23, rue du Loess, 67037 Strasbourg France (Dahoumane, M.; Hu, Y.) \|\| laboratoire de physique subatomique et de cosmologie (LPSC), 53, Avenue des Martyrs, 38026 Grenoble France (Bouvier, J.; Dzahini, D.; Martel, L. Gallin; Lagorio, E.; Hostachy, J-Y.)
Abstract	The use of CMOS Monolithic Active Pixel Sensors (MAPS) for high precision minimum ionizing particle tracking has been proven to be a viable and powerful novel experimental technique. Possible applications will strongly depend on a successful implementation of on-chip hit recognition and sparsification schemes. For this aim, a 5 bit very low power and low level signal analog to digital converter (ADC) using a double sampling switched capacitor technique has been implemented in 0.35µm CMOS technology. A non-resetting sample and hold stage is integrated. This first stage compensates both the amplifier offset effect and the input common mode voltage fluctuations. The converter is composed of three successive 1.5 bit pipeline stages followed by a 2 bit flash stage. The prototype consists of 16 ADC double-channels; each one is sampling at 50 MS/s and dissipates only 1.38 mW at 2 V supply voltage. A bias pulsing stage is integrated in the circuit. Therefore, the analog part is switched OFF or ON in less than 1 µs. The size of the ADC is 80 µm × 1.4 mm. This corresponds to the pitch of 4 pixel columns in which each one is 20 µm wide and can be easily integrated in the MAPS.
Starting Page	2091
Ending Page	2097
File Size	7052383
Page Count	7
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4774909
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sampling methods Pixel Image sensors Biosensors Biomedical imaging CMOS technology CMOS image sensors Particle tracking Analog-digital conversion Capacitors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

Optimization of pipelined ADC architecture for Monolithic Active Pixel Sensors

A Low Power and Low Signal 5-bit 25 MS/s Pipelined ADC for Monolithic Active Pixel Sensors

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

A pixel column level, ultra low power, 9Msample/s multi bit A/D converter for Monolithic Active Pixel Sensors in high energy physics

CMOS APS imager employing 3.3 V 12 bit 6.3 MS/s pipelined ADC

A 10-BIT 100MS/s pipelined ADC IN 0.18μm CMOS technology

A 10-bit 50 MS/s Pipelined ADC With Capacitor-Sharing and Variable-$g_{m}$ Opamp

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

A very low power and low signal 5 bit 50 M samples/s double sampling pipelined ADC for Monolithic Active Pixel Sensors in high energy physics and biomedical imaging applications

Similar Documents

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

Optimization of pipelined ADC architecture for Monolithic Active Pixel Sensors

A Low Power and Low Signal 5-bit 25 MS/s Pipelined ADC for Monolithic Active Pixel Sensors

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

A pixel column level, ultra low power, 9Msample/s multi bit A/D converter for Monolithic Active Pixel Sensors in high energy physics

CMOS APS imager employing 3.3 V 12 bit 6.3 MS/s pipelined ADC

A 10-BIT 100MS/s pipelined ADC IN 0.18μm CMOS technology

A 10-bit 50 MS/s Pipelined ADC With Capacitor-Sharing and Variable-$g_{m}$ Opamp

A low power and low signal 4 bit 50MS/s double sampling pipelined ADC for Monolithic Active Pixel Sensors

A very low power and low signal 5 bit 50 M samples/s double sampling pipelined ADC for Monolithic Active Pixel Sensors in high energy physics and biomedical imaging applications