NDLI: Data acquisition system for multi channel silicon drift diode-based detector

Content Provider	IEEE Xplore Digital Library
Author	Kim, Yongkwon Moon, JaeKook Lee, Jonghee Yoon, Kyuyoung Ahn, Yongbok Bae, Seungbin Lee, Hakjae Lee, Kisung Joung, Jinhun
Copyright Year	2008
Description	Author affiliation: Institute for Health Science, Korea University, Jeongneung 3-Dong, Seongbuk-Gu, Seoul 136-703, Korea (Kim, Yongkwon) \|\| Division of Information & Communication Engineering, Kongju National University, Budae-Dong, Cheonan, 330-717, Korea (Bae, Seungbin) \|\| College of Health Sciences, Korea University, Jeongneung 3-Dong, Seongbuk-Gu, Seoul 136-703, Korea (Lee, Hakjae; Lee, Kisung) \|\| OsteoSys Co. Ltd., Seoul, Korea (Moon, JaeKook; Lee, Jonghee; Yoon, Kyuyoung; Ahn, Yongbok) \|\| Siemens Medical Solutions, Hoffman Estates, IL, 60195 U.S.A. (Joung, Jinhun)
Abstract	We have developed front-end electronics and data acquisition unit for a silicon drift diode (SDD) based prototype detector. The prototype detector consists of an array of 67 SDDs. The array is bump-bonded on a mother board which is cooled by Peltier-water based cooling system. In this study, we describe the function of front-end electronics (including preamplifier, shaper and peak stretcher units) and a data acquisition (DAQ) unit. The hardware consists of three major blocks: 1) a preamplifier board that amplifies the SDD signal, 2) a shaping and stretcher board that shapes event signal and stretches it, and 3) DAQ board that converts analog signal to digital and acquires digitized data. The preamp board amplifies 67 channel SDD signals with OP-amps and controls the jFET of each SDD to optimize reset interval and gain. The shaping board consists of 5 sub-blocks that are shaper, peak stretcher, MUX, discriminator and SHP_ctrl. It shapes the preamplifier signal and generates event signals. The DAQ consists of an array of A/D converters and FPGAs. In our FPGA simulation, the system uses 62% of memory, 21% of LOGIC slice. We evaluated and verified 3 boards with including FPGA program. In the result we found and settled some problems which cross talk and noise. However, we meet two problems that are SDD sensor board and synchronous reset circuit. We will fix some problems and evaluate the detector performance such as spatial resolution and energy spectrum, etc. We will also include the results of phantom study later.
Starting Page	4074
Ending Page	4077
File Size	5846668
Page Count	4
File Format	PDF
ISBN	9781424427147
ISSN	10957863
DOI	10.1109/NSSMIC.2008.4774178
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-19
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Data acquisition Silicon Diodes Detectors Preamplifiers Field programmable gate arrays Prototypes Shape Sensor arrays Electronics cooling
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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