NDLI: A forensic chip for secure digital video recording

Content Provider	IEEE Xplore Digital Library
Author	Cheng, L.M. Cheng, L.L.
Copyright Year	2010
Description	Author affiliation: Department of Electronic Engineering, City University of Hong Kong, Hong Kong (Cheng, L.L.) \|\| Department of Electronic Engineering City University of Hong Kong Hong Kong (Cheng, L.M.)
Abstract	The rapid advancement of digital scanner, digital camera and digital video recorder technologies has created a huge market for digital multi-media, such as documents, photos and videos, storage, retrieval and reproduction market. The ease of modifications using editing tools makes the identification of original masterpiece difficult and these forgeries sometimes become an important issue for identification, authentication and law enforcement. The demand of a security protection chip increases as digital documents in form of digital video became popular and forensic approaches for detecting forgery evident became vital. In this paper, a real time forensic chip is designed and implemented. This Chip captures real time video frames and encodes forensic mark into the video frame. The video frame with forensic mark embedded is then transmitted to remote host through TCP/IP. On the remote host, the same Chip can be used to decode the stored forensic mark from the received video frame. Any modifications to the original captured video can immediately be detected by the chip in real time.
Starting Page	3068
Ending Page	3071
File Size	407703
Page Count	4
File Format	PDF
ISBN	9781424453085
DOI	10.1109/ISCAS.2010.5537981
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-30
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Forensics Video recording Forgery Digital cameras Authentication Law enforcement Security Protection TCPIP Decoding
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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