NDLI: Analysis of ultralow-power asynchronous ADCs

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2015 IEEE International Symposium on Circuits and Systems (ISCAS)

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013)

2012 IEEE International Conference on Circuits and Systems (ICCAS)

2012 IEEE International Symposium on Circuits and Systems

2011 IEEE International Symposium of Circuits and Systems (ISCAS)

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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Table of contents

Formation and annihilation of Cu conductive filament in the nonpolar resistive switching Cu/ZrO2:Cu/Pt ReRAM

Organic memristors : Basic principles

Memristive devices fabricated with silicon nanowire schottky barrier transistors

Si Memristive devices applied to memory and neuromorphic circuits

Understanding weak loop filter nonlinearities in continuous time ΔΣ converters

A generalized approach to design CT ΣΔMs based on FIR DAC

Dual-mode Continuous-Time Quadrature Bandpass ΔΣ modulator with Pseudo-random Quadrature mismatch shaping algorithm for Low-IF receiver application

Systematic design of continuous-time ΣΔ modulator with VCO-based quantizer

Multirate hybrid CT/DT cascade ΣΔ modulators with decreasing OSR of back-end DT stages

Exploiting locality to improve leakage reduction in embedded drowsy I-caches at same area/speed

An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI

Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier

Minimizing energy consumption of a chip multiprocessor through simultaneous core consolidation and DVFS

Prospects and implementation of Non-DVFS dynamic thermal management techniques

Finding the minimum sampling frequency of multi-band signals: An efficient iterative algorithm

Breaking the SNR wall of spectrum sensing in cognitive radio by using the chaotic stochastic resonance

Design paradigm for standard agnostic channelization in flexible mobile radios

Split-radix FFT pruning for the reduction of computational complexity in OFDM based Cognitive Radio system

What did Gustav Robert Kirchhoff stumble upon 150 years ago?

Important questions related to the education of the mathematics of circuits and systems

Terminals and ports

An industry-driven laboratory development for mixed-signal IC test education

A compact course on VHDL-AMS

Motion detection using an aVLSI network of spiking neurons

Synthesis of log-domain integrators for silicon synapses with global parametric control

An adaptive neuron circuit for signal compression

Replicating experimental spike and rate based neural learning in CMOS

A temperature compensated array of CMOS floating-gate analog memory

Fast algorithm on selecting bi-directional prediction type in H.264/AVC scalable video coding

Lloyd-Max quantization-based priority index assignment for the scalable extension of H.264/AVC

Hybrid color compensation for virtual view synthesis in multiview video applications

Block-based distributed video coding with variable block modes

Chaos, coexisting attractors, and fractal basin boundaries in DC drives with full-bridge converter

Bifurcations in load resonant DC-DC converters

Analysis of aperiodic and chaotic motions in a switched reluctance linear motor

Periodic steady-state solutions of nonlinear circuits based on a differentiation matrix

Cryptanalysis of chaotic convolutional coder

A VLSI design of sensor node for wireless image sensor network

Single phase MOS-NDR mobile networks

High-throughput protocol converter based on an independent encoding/decoding scheme for asynchronous Network-on-Chip

Effective modelling of large NoCs using SystemC

A scalable and fault-tolerant routing algorithm for NoCs

Digital filters with sparse coefficients

Active beamforming with interpolated FIR filterin

Low-complexity linear phase fir filters in cascade form

Redundancy reduction for high-speed fir filter architectures based on carry-save adder trees

Fixed-point FIR filter design and implementation in the expanding subexpression space

A 25 Gbps inductorless receiver front-end in 65-nm CMOS for serial links

A clock synchronization system with IEEE 1588–2008 adapters over existing Gigabit Ethernet equipment

Analog front-end for a 3 Gb/s POF receiver

A 5Gb/s pulse signaling interface for low power on-chip data communication

A 15-Gb/s preamplifier with 10-dB gain control and 8-mV sensitivity in 65-nm CMOS

A low power ultra-wideband CMOS LNA for 3.1–10.6-GHz wireless receivers

A low power single ended input differential output low noise amplifier for L1/L2 band

A 10MHz to 100MHz bandwidth scalable, fully differential current feedback amplifier

A low-voltage, high linear programmable triode transconductor

Tunable rail-to-rail FGMOS transconductor

State-of-the-art and future directions of high-performance all-digital frequency synthesis in nanometer CMOS

All-digital frequency and clock synthesis architectures from a signals and systems perspective, current state and future directions

A comparative study between Fractional-N PLL and Flying-Adder PLL

An all-digital PLL with a first order noise shaping Time-to-Digital Converter

Calculation of the cycle length in a HK-MASH DDSM with multilevel quantizers

On scalable spiking convnet hardware for cortex-like visual sensory processing systems

Convolutional networks and applications in vision

Hardware accelerated convolutional neural networks for synthetic vision systems

Embedded facial image processing with Convolutional Neural Networks

Suggestions for a biologically inspired spiking retina using order-based coding

System design principles combining sub-threshold circuit and architectures with energy scavenging mechanisms

Maximum power point considerations in micro-scale solar energy harvesting systems

Logic-compatible embedded DRAM design for memory intensive low power systems

Harvesting kinetic energy with switched-inductor DC-DC converters

Circuit design advances to enable ubiquitous sensing environments

A time encoded decimation filter for noise shaped power DACs

A digital background correction technique combined with DWA for DAC mismatch errors in multibit ΣΔ ADCs

Precise area-controlled return-to-zero current steering DAC with reduced sensitivity to clock jitter

Efficient determination of feedback DAC errors for digital correction in ΔΣ A/D converters

A sixth-order 4–2 SMASH CIFF complex bandpass ΔΣ modulator with delaying digital input feedforward

A compact and low power logic design for multi-pillar vertical MOSFETs

A low-power cell-based-design multi-port register file in 65nm CMOS technology

A new low-power high-speed single-clock-cycle binary comparator

Clock distribution in clock domains with Dual-Edge-Triggered Flip-Flops to improve energy-efficiency

A 19μW, 100kbps Impulse Radio transceiver for body-area-networks

A current-mode 6–9GHz UWB transmitter with output power flattening technique

Low-power UWB transmitter using a combined mixer and power amplifier

Derivation of circuit specification for the UWB impulse radio transceivers

A transmitted-reference low-power reconfigurable ultra-wideband transmitter

A bio-inspired ultrasensitive imaging chip — Phase one: Design paradigm

Event-based color change pixel in standard CMOS

A single bit memory per pixel time domain DPS using multi-reset integration scheme

Compact readout circuits for SPAD arrays

A load-balancing readout method for large event-based PWM imaging arrays

Poisson distributed noise generation for spiking neural applications

Floating gate synapses with spike time dependent plasticity

GPU implemention of fast Gabor filters

Guaranteeing spike arrival time in multiboard & multichip spiking neural networks

High performance implementation of Neural Networks by networks on chip with 5-port 2-virtual channels

Prediction-based macroblock mode mapping for video coding

A VLSI architecture of cost calculation and all-zero block detection for fractional motion estimation

Perceptual-based coding mode decision

Fast mode decision for KTA software

An adaptive bandwidth reduction scheme for video coding

Effect of clustering coefficient on cooperation in scale-free public goods game

The roles of small-world and degree heterogeneity on evolutionary behavior networks

An opinion disseminating model for market penetration in social networks

On decentralized adaptive pinning synchronization of complex dynamical networks

Impulsive synchronization on complex networks of nonlinear dynamical systems

A high speed IC Random Number Generator based on phase noise in ring oscillators

Hardware implementation of the double-tree scan architecture

Fast and scalable priority encoding using static CMOS

Multi-cycle compress technique for high-speed IP in low-cost environment

Efficient high-throughput architectures for high-speed parallel scramblers

Wide-band length-6 cubic interpolator

Fraction-free inversion of a Toeplitz matrix

A 30fps stereo matching processor based on belief propagation with disparity-parallel PE array architecture

Minimal Logic Depth adder tree optimization for Multiple Constant Multiplication

On joint synchronization of clock offset and skew for Wireless Sensor Networks under exponential delay

High-speed re-encoder design for algebraic soft-decision Reed-Solomon decoding

Memory-reduced MAP decoding for double-binary convolutional Turbo code

An early stopping criterion for decoding LDPC codes in WiMAX and WiFi standards

Dual-rail decoding of low-density parity-check codes

Layered decoding for non-binary LDPC codes

A 3.1–4.8-GHz energy-detector front-end for non-coherent OOK impulse-radio UWB

Monolithic CMOS HD radio: Architecture design and front-end implementation

Low power 2.4 GHz quadrature generation for body area network applications

A 21pJ/pulse FCC compliant UWB pulse generator

A 13MHz input, 480MHz output Fractional Phase Lock Loop with 1MHz bandwidth

The use of spike-based representations for hardware audition systems

Characteristics of human voice processing

Exploiting spike-based dynamics in a silicon cochlea for speaker identification

Mean firing rate spike representations for speech recognition

One step Backpropagation Through Time for learning input mapping in reservoir computing applied to speech recognition

Robustness of stability regions of nonlinear circuits and systems under parameter variation

Critical load-shedding time calculation based on region of attraction limits

Trajectory approximation near the stability boundary

On-line power system stability screening of practical power system models using TEPCO-BCU

Probability metrics to calibrate stochastic chemical kinetics

Design of an insulation device using phosphotransfer systems

Computational methods for analyzing bistability in biochemical reaction networks

iSSA: An incremental stochastic simulation algorithm for genetic circuits

Rule based constraints for the construction of genetic devices

Adaptive compensation of frequency response mismatches in high-resolution time-interleaved ADCs using a low-resolution ADC and a time-varying filter

Radix-based digital correction technique for two-capacitor DACs

Foreground digital calibration of non-linear errors in pipelined A/D converters

New calibration technique for current-steering DACs

Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization

A 32Gbps low propagation delay 4×4 switch IC for feedback-based system in 0.13μm CMOS technology

A low-power IP design of Viterbi decoder with dynamic threshold setting

Matching pursuit: Evaluation and implementatio for LTE channel estimation

VLSI implementation of a WiMAX/LTE compliant low-complexity high-throughput soft-output K-Best MIMO detector

A simple energy efficient transceiver for IEEE 802.15.4

A novel high-speed and low-power negative voltage level shifter for low voltage applications

High-voltage rectifier and voltage doubler in conventional 0.18μm CMOS process

Low quiescent current variable output digital controlled voltage regulator

Takagi-Sugeno fuzzy model to approximate MOSFET capacitance for VRM applications

Hardware-software co-design of an embedded power management module with adaptive on-chip power processing schemes

Integrated polarization-analyzing CMOS image sensor

A row-parallel cyclic-line-access edge detection CMOS image sensor employing global thresholding operation

A 1 MPixel CCD image sensor with aluminum nanowire polarization filter

Intensity histogram CMOS image sensor for adaptive optics

Liquid-crystal micropolarimeter array for visible linear and circular polarization imaging

Using QBF to increase accuracy of SAT-based debugging

Improving verification coverage of analog circuit blocks by state space-guided transient simulation

Efficient test generation with maximal crosstalk-induced noise using unconstrained aggressor excitation

Fault collapsing with linear complexity in digital circuits

Detection of inter-port bridging faults in dual-port memories

Low complexity MAD prediction algorithms for rate controllable H.264/AVC hardware encoders

Efficient inter-layer prediction hardware design with extended spatial scalability for H.264/AVC scalable extension

Efficient macroblock pipeline structure in high definition AVS video encoder VLSI architecture

Down-sampling based video coding with super-resolution technique

A lossless frame recompression scheme for reducing DRAM power in video encoding

Building synchronizable and robust networks

Fully adaptive pinning control of complex networks

Robust adaptive control of a class of nonlinear systems by internal model design

Basins of attraction for periodic solutions of discretized sliding mode control systems

Automatic skill acquisition in Reinforcement Learning using connection graph stability centrality

A high performance pseudo-multi-core ECC processor over $GF(2^{163})$

A novel counter-based low complexity inner-product architecture for high speed inputs

A radix-4 single-precision floating point divider based on digit set interleaving

Design of high-speed bit-serial divider in $GF(2^{m})$

Fast hard multiple generators for radix-8 Booth encoded modulo $2^{n}−1$ and modulo $2^{n}+1$ multipliers

Frequency domain limitations of non-negative impulse response non-lowpass filters

Novel low complexity lattice filters with overflow property close to the normalized lattice

Analytical synthesis of minimum L2-sensitivity realizations of all-pass digital filters

Polynomial implementation structure for lagrange-type variable fractional delay filters

Design of IIR allpass fractional-delay fractional Hilbert transformer using complex cepstrum

45-nm Planar bulk-CMOS 23-GHz LNAs with high-Q above-IC inductors

30–39GHz 2Gbit/s ring oscillator based OOK-modulator for chip-to-chip communications

Bandwidth enhancement of passive filters at mm-wave frequencies using effective negative group index (NGI) structures

A W-band LNA in 0.18-μm SiGe BiCMOS

A 40 Gb/s transimpedance amplifier in 65 nm CMOS

Wide swing signal amplification by SC voltage doubling

Low-power ripple-free chopper amplifier with correlated double sampling de-chopping

A phase-shift self-oscillating stereo class-D amplifier for battery-powered applications

Low-voltage gm-enhanced CMOS differential pairs using positive feedback

Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs

A 2-dimensional Si nanodisk array structure for spiking neuron models

Analysis of NBTI-induced SNM degradation in power-gated SRAM cells

Dual-stylus-arm scratch drive micro-robots controlled by a communication channel

Blind carrier frequency offset estimation for OFDM systems by probability density function

Sigma-delta learning for super-resolution source separation on high-density microphone arrays

A block-based adaptive super-exponential deflation algorithm for blind deconvolution of MIMO systems using the matrix pseudo-inversion lemma

A joint block diagonalization approach to convolutive blind source separation

Blind resampling parameter estimation for doubly selective underwater acoustic channels (Invited Paper)

Digital signal processing for reducing the effects of RF imperfections in radio devices — An overview

Softransceiver transmit origin offset compensation: Digital to the rescue of RF-CMOS

Emerging multi-level architectures and unbalanced mismatch calibration technique for high-efficient and high-linear LINC systems

An IIP2 digital calibration technique for passive CMOS down-converters

Sampling clock jitter estimation and compensation in ADC circuits

A DC-DC Converter using a high speed soft-start control circuit

A resistor-less overload detector for dc/dc linear regulators

Low noise linear voltage regulator for use as an on-chip PLL supply in microprocessors

A resistor-free temperature-compensated CMOS current reference

Low-dropout voltage reference: An approach to buffered architectures with low sensitivity

A direct bitstream manipulation approach for Virtex4-based evolvable systems

Computation in communication: Spike event coding for programmable analog arrays

Crossbar switch matrix for floating-gate programming over large current ranges

A novel scalable and reconfigurable emulation platform for embedded systems verification

Voltage-mode quaternary FPGAs: An evaluation of interconnections

A low voltage CMOS rectifier for wirelessly powered devices

Fully integrated ultra-low-power asynchronously driven step-down DC-DC converter

Circuit/system design space characterization of EER-based transmitter for 802.11a WLAN standard

Translayer optimized co-design of in-space microwave based wireless power transfer

An ultra-low-voltage active rectifier for energy harvesting applications

POSFET devices based tactile sensing arrays

Fully on-chip temperature, process, and voltage sensors

Genetic-based automated synthesis and optimization of MEMS accelerometers with sigma-delta control

Dual-line distance sensor with on-chip phase generator and suppression of ambient light

Low-power charge sensitive amplifier for semiconductor scintillator

Whitespace insertion for through-silicon via planning on 3-D SoCs

Case Study: GPU-based implementation of sequence pair based floorplanning using CUDA

Performance-driven high-level synthesis with floorplan for GDR architectures and its evaluation

A floorplan method for asynchronous circuits with bundled-data implementation on FPGAs

Post-placement STI well width adjusting by geometric programming for device mobility enhancement in critical path

Partial video encryption based on alternative integer transforms

Composing better pictures in MDC: A multi-target total variational approach

Macroblock level hybrid temporal-spatial prediction for H.264/AVC

Improving H.264/AVC video coding with adaptive coefficient suppression

Improved hybrid coding scheme for intra 4×4 residual block produced by H.264/AVC

4-Channel asynchronous bio-potential recording system

WiiEMG: A real-time environment for control of the Wii with surface electromyography

A novel energy-efficient stimuli generator for very-high impedance intracortical microstimulation

A current generator circuit for tripolar stimulation and insensitive to temperature and supply variations

Analog complex gammatone filter for cochlear implant channels

Digital enhancement of frequency synthesizers

EMI reduction by resonant clock distribution networks

An area efficient design methodology for SEU tolerant digital circuits

Analysis and optimization of sequential circuit element to combat single-event timing upsets

ESD protection circuit for high-voltage CMOS ICs with improved immunity against transient-induced latchup

Two-dimensional partially differential cepstrum and minimum-phase sequence construction

Non-fragile H∞ filter design for polytopic 2-D systems in Fornasini- Marchesini model

Application specific stability of 2-D Roesser model realizations

Multidimensional raster-scanned LC-ladder wave-digital filter hardware for directional filtering in space-time

State-space formulation of n-variable bilinear transformation for n-D systems

Optimizing throughput for limited receiver circuit power

Gain and delay mismatches cancellation in LINC and polar transmitters

IQ mismatch compensation using time domain signal processing: A practical approach

How to choose the ADC resolution for short range low power communication?

BER-optimal analog-to-digital converters for communication links

An improved wide-dynamic range tunable RF interference suppression notch filter

Towards the realization of fractional step filters

Tunable current-mode log-domain universal filter

CMOS-based current-controlled DDCC and its applications

Current conveyor with very low output impedance voltage buffer for laboratory instrumentation

Decomposition of drain-current variation into gain-factor and threshold voltage variations

A successive approximation based process-invariant ring oscillator

A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification

Temperature sensor placement in thermal management systems for MPSoCs

Exploiting time resolution in nanometre CMOS data converters

On the characterization of limit cycle modes in oversampled data converters

Extended modelling for time-encoding converters

Pulse-width modulation in sigma-delta modulators

All-digital differential VCO-based A/D conversion

A differential $5^{th}$ derivative Gaussian pulse generator for UWB transceivers

A Mode-I/Mode-III UWB LNA with programmable gain and 20 dB WLAN blocker rejection in 130nm CMOS

Gated threshold compensated noncoherent PPM receiver for UWB impulse radio

A digitally programmable ring oscillator in the UWB range

The theoretical efficiency in digital envelope power amplifiers for WLAN OFDM polar transmitters

A novel RFID tag chip with temperature sensor in standard CMOS process

Configurable MCPW based inductor for mm-wave circuits and systems

A novel sigma-delta fractional-N synthesizer architecture with fractional spur and quantization noise cancellation

An adaptive body-bias low voltage low power LC VCO

Active polyphase filter analysis

Double-threshold reversible data hiding

Data hiding in halftone images with secret-shared dot diffusion

High capacity reversible data hiding using the histogram modification of block image

A SOT based digital audio coder using reference frame ordering method

Sub-Sampling Framework of Distributed Video Coding

A bandwidth-efficient embedded compression algorithm using two-level rate control scheme for video coding system

Parallel implementation of computing-intensive decoding algorithms of H.264 on reconfigurable SoC

Perceptual energy scalable video encoding method based on Just Noticeable Distortion

Nonlinear image restoration using recurrent radial basis function network

Real-time multi-view rendering architecture for autostereoscopic displays

An efficient denoising chip for the removal of impulse noise

Semantic adaptation of consumer photo for mobile device access

An efficient skipping method of H.264/AVC weighted prediction for various illuminating effects

Advanced characterization of piezoresistive sensors for human body movement tracking

Automatic Configuration of a Medical Imaging System to Unknown Delays in Synchronous Input Data Channels

A Study on the impact of spectral variability in brain-computer interface

A VLSI neural monitoring system with ultra-wideband telemetry for awake behaving subjects

Ultra-high speed atomic force microscopy: Video-rate and beyond

An efficient 13.56 MHz active back-telemetry rectifier in standard CMOS technology

Design of OOK system for wireless capsule endoscopy

MOSFET-only Mixer/IIR filter with gain using parametric amplification

Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices

Wireless ECG detection system with low-power analog front-end circuit and bio-processing ZigBee firmware

A high-gain, low-noise CMOS amplifier for sampled bio-potential recording

An ultra-compact and efficient Li-ion battery charger circuit for biomedical applications

Multi-channel CMOS front-end IC for physiological signal acquisition

CMOS current-copying neural stimulator with OTA-sharing

A Novel 0.5 V bulk-input OTA in 90 nm CMOS

A switched-capacitor Programmable Gain Amplifier optimized for motor control application using correlated double sampling technique

Novel ultra low voltage transconductance amplifier

A micropower comparator for high power-efficiency hearing aid class D amplifiers

An interstage correlated double sampling technique for switched-capacitor gain stages

Linear low-frequency filter using on-chip giga-ohm resistance

Subthreshold current mode matrix determinant computation for analog signal processing

Optimizing continuous-time filters driven by bang-bang signals

Low-voltage Bluetooth/ZigBee complex filter using current mirrors

A new concept of continuous-time narrow bandpass Q-varying filter with transient suppression

SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit

CMOS operational amplifiers with continuous-time capacitive common mode feedback

A highly accurate piezoelectric actuator driver IC for auto-focus in camera module of mobile phone

A column readout channel for infrared and terahertz bolometers with direct analog to digital conversion

Mixed signal phase sensitive detection

U-shaped slow-wave transmission lines in 0.18μm CMOS

A high resolution metastability-independent two-step gated ring oscillator TDC with enhanced noise shaping

Three novel improved CMOS capacitance scaling schemes

A highly efficient transient and frequency-response simulation method for switching converters without using a SPICE-like analog simulator

Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS)

A low-power active switched-capacitor loop filter for phase locked loops

On some properties of the output of a pulsed digital oscillator working with multiple resonances

Nonlinearity and dynamics in RF Oscillators: Analysis and design implications

A 2.4-GHz reference doubled fractional-N PLL with dual phase detector in 0.13-μm CMOS

An extended Popov criterion for absolute stability of descriptor systems with ferromagnetic hysteresis nonlinearities

Faster adaptive parallel diagnosis in the presence of intermittent faults (extended abstract)

Reducing offset errors in MITE systems by precise floating gate programming

Heuristic algorithms for the marking construction problem of Petri nets

Control of inverted pendulum using adaptive neuro fuzzy inference structure (ANFIS)

Optimal stochastic resonance under low signal-to-noise ratio circumstances

Exactly solvable chaotic circuit

Chaos glial network connected to Multi-Layer Perceptron for Solving Two-Spiral Problem

Stochastic delay differential equation and its application on communications

Synchronization phenomena in coupled logistic maps involving parametric force

A ±6ms-accuracy, $0.68mm^{2}$ and 2.21μW QRS detection ASIC

The performance of visuo-motor coordination changes under force feedback assistance system

Development of real-time wireless brain computer interface for drowsiness detection

Amplification circuit and microelectrode array for HL-1 Cardiomyocyte action potential measurement

Epileptic seizure detection in grouped multi-channel EEG signal using ICA and wavelet transform

Live demonstration: Asynchronous time-based image sensor (ATIS) camera with full-custom AE processor

Live demonstration: Neuro-inspired system for realtime vision tilt correction

Neuro-inspired system for real-time vision sensor tilt correction

Live demonstration: Real time objects tracking using a bio-inspired processing cascade architecture

Real time multiple objects tracking based on a bio-inspired processing cascade architecture

Live demonstration: A 64×64 pixels UWB wireless temporal-difference digital image sensor

A 64×64 pixels UWB wireless temporal-difference digital image sensor

Live demonstration: Dynamic stereo vision system for real-time tracking

Dynamic stereo vision system for real-time tracking

Live demonstration: Intelligent ubiquitous sensor network for sound acquisition

Intelligent ubiquitous sensor network for sound acquisition

Live demonstration: FPGA-based real-time acoustic camera prototype

FPGA-based real-time acoustic camera prototype

Live demonstration: The self-tuned regenerative electromechanical parametric amplifier

The self-tuned regenerative electromechanical arametric amplifier: A model for Active amplification in the cochlea

Overview: Emerging technologies on giga-scale FPGA implementat

Mixed-signal system-on-chip verification using a recursively-verifying-modeling (RVM) methodology

Asynchronous FPGA architecture with distributed control

60 GHz meta-material wideband antenna for FPGA Giga bit data transmission

cFPGA: CNT emerging memory-based FPGA

Two-step junction-splitting SAR analog-to-digital converter

Energy-efficient time-interleaved and pipelined SAR ADCs

Capacitor scaling for low-power design of cyclic analog-to-digital converters

A radix-3 SAR analog-to-digital converter

Capacitor array structure and switching control scheme to reduce capacitor mismatch effects for SAR analog-to-digital converters

Closed-form analysis of DC noise immunity in subthreshold CMOS logic circuits

Power gating for ultra-low voltage nanometer ICs

Ultra low voltage static carry generate circuit

Multiobjective optimization for transistor sizing sub-threshold CMOS logic standard cells

Robustness-aware sleep transistor engineering for power-gated nanometer subthreshold circuits

A 128/256-point pipeline FFT/IFFT processor for MIMO OFDM system IEEE 802.16e

High-throughput QR decomposition for MIMO detection in OFDM systems

A multiple code-rate turbo decoder based on reciprocal dual trellis architecture

Harvesting a clock from a GSM signal for the wake-up of a wireless sensor network

Phase difference and frequency offset estimation for collaborative beamforming in sensor networks

Accuracy and power tradeoff in spike sorting microsystems with cubic spline interpolation

Optimization of bipolar and tetrapolar impedance biosensors

Development of water-soluble sono/photo-sensitive nanopartices for cancer treatment

Fabrication and electrical characteristics of memristors with TiO2/TiO2+x active layers

An integrated patch-clamp system with dual Input

Use of a continuation method for analyzing startup circuits

A qualitative analysis of a complementary differential LC injection-locked frequency divider based on direct injection

Estimating the locking range of analog dividers through a phase-domain macromodel

A fast procedure for canonical ambiguity groups determination in nonlinear analog circuits

Experimental validation of a novel adaptive controller for piecewise affine systems

Robust face recognition using subface hidden Markov models

Directional Variance: A measure to find the directionality in a given image segment

Local affine motion prediction for H.264 without extra overhead

Video bsckground inpainting using dynamic texture synthesis

Analysis of template matching prediction and its application to parametric overlapped block motion compensation

A wide-input linear range sub-threshold transconductor for sub-Hz filtering

A rail-to-rail full clock fully differential rectifier and sample-and-hold amplifier

A new rail-to-rail comparator with adaptive power control for low power SAR ADCs in biomedical application

Single Miller compensation using inverting current buffer for multi-stage amplifiers

Compact low-voltage CMOS current-mode multiplier/divider

Multi-chains encoding scheme in low-cost ATE

Test power reduction with test-time trade-off

Delay analysis of sub-path on fabricated chips by several path-delay tests

Neural network based on-chip thermal simulator

Temperature and power measurement of modern dual core processor by infrared thermography

Structurally regular integer discrete cosine transform for low-bit-word-length coefficients

Modified Discrete Fourier Transforms for fast convolution and adaptive filtering

A novel approach for FFT data reordering

On Hilbert-pairs from non-minimum phase Daubechies filters

Comparison of Haar wavelet-based and Poisson-based numerical integration techniques

A 2.4 GHz reference-less wireless receiver for 1Mbps QPSK demodulation

A 2.2mW CMOS LNA for 6–8.5GHz UWB receivers

A 1.6 mW 5.4 GHz transformer-feedback gm-boosted current-reuse LNA in 0.18/μm CMOS

Novel MOSFET-only bandgap voltage reference

Low voltage CMOS bandgap references with temperature compensated reference current output

32-bit Configurable bias current generator with sub-off-current capability

A compact adaptive slope compensation circuit for Current-Mode DC-DC converter

Enhanced RF to DC CMOS rectifier with capacitor-bootstrapped transistor

On neuromorphic spiking architectures for asynchronous STDP memristive systems

Development of a functional model for the Nanoparticle-Organic Memory transistor

Carbon nanotube-based programmable devices for adaptive architectures

Robustness of logic gates and reconfigurability of neuromorphic switching networks

Characterization of memristive Poly-Si Nanowires via empirical physical modelling

Block-based image steganalysis: Algorithm and performance evaluation

Mobile camera identification using demosaicing features

Identification of cut & paste tampering by means of double-JPEG detection and image segmentation

Color based soft biometry for hooligans detection

Resolution variant visual cryptography for street view of Google Maps

Experimental study of leakage-delay trade-off in Germanium pMOSFETs for logic circuits

32nm and beyond Multi-VT Ultra-Thin Body and BOX FDSOI: From device to circuit

SRAM design in fully-depleted SOI technology

Design of a CNFET array for sensing and control in P450 based biochips for multiple drug detection

Design aspects of carry lookahead adders with vertically-stacked nanowire transistors

Offset cancellation for zero crossing based circuits

High-speed differential resistor ladder for A/D converters

13-bit 205 MS/s time-interleaved pipelined ADC with digital background calibration

Pseudo-differential zero-crossing-based circuit with differential error suppression

A 1.6-GHz, 54-dB signal-to-noise and distortion ratio pipeline A/D converter

Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops

A novel variation insensitive clock distribution methodology

Statistical timing yield improvement of dynamic circuits using negative capacitance technique

Globally integrated power and clock distribution network

A 55nm 1GHz one-cycle-locking de-skewing circuit

Low-power design of variable block-size LDPC decoder using nanometer technology

Implementation of enhanced CDMA utilizing low complexity joint detection with iterative processing

Efficient FPGA implementation of a wireless communication system using Bluetooth connectivity

A FIR baseband filter for high data rate 60-GHz wireless communications

On-the-fly speed and power scaling of an E-TSPC dual modulus prescaler using forward body bias in 0.25 μm CMOS

Portable biomarker detection with magnetic nanotags

3D Oncological PET volume analysis using CNN and LVQNN

The SAW resonators on LiNb03 for mass-sensing applications

Is SystemC-AMS an appropriate "promoter" for the modeling and simulation of bio-compatible systems?

The extended ear type system and possible applications

Narrowband interference reduction in UWB systems based on spreading sequence spectrum shaping

Spectral analysis of Internet topology graphs

On two-directional orthogonal ray graphs

Image processing using diffusion processes

A heuristic solution to the optimisation of flutter control in compression systems (and to some more binary quadratic programming problems) via ΔΣ modulation circuits

Streaming capacity in multi-channel P2P VoD systems

Joint source channel coding with Hermitian symmetric DFT codes

Multiple-description video coding based on JPEG 2000 MQ-coder registers

On-the-fly tone mapping for backward-compatible high dynamic range image/video compression

An entropy coding method for floating-point texture coordinates of 3D mesh

A 250MHz-to-4GHz Δ-Σ fractional-N frequency synthesizer with adjustable duty cycle

An effective phase detector for phase-locked loops with wide capture range and fast acquisition time

17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection

A power amplifier with minimal efficiency degradation under back-off

Miniaturized CMOS thermal sensor array for temperature gradient measurement in microprocessors

Partitioning and synthesis for hybrid architecture simulators

Automatic communication synthesis with hardware sharing for design space exploration

State-dependent changeable scan architecture against scan-based side channel attacks

Towards a comprehensive and systematic classification of hardware Trojans

Fault and simple power attack resistant RSA using Montgomery modular multiplication

A subspace-based method for DOA estimation of uniform linear array in the presence of mutual coupling

A 22.4 mW competitive fuzzy edge detection processor for volume rendering

Semi-blind CFO, channel estimation and data detection for OFDM systems over doubly selective channels

A group of macroblock based motion estimation algorithm supporting adaptive search range for H.264 video coding

Super-resolution technique for thermography with dual-camera system

Fully integrated 9 GHz CMOS VCO with very low phase noise

A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks

Reliability study of a low-voltage Class-E power amplifier in 130nm CMOS

A switch mode resonating H-Bridge polar transmitter using RF ΣΔ modulation

Efficiency enhancement and linearity trade-offs for cascode vs. common-emitter SiGe power amplifiers in WiMAX polar transmitters

PCA application to frequency reduction for fault diagnosis in analog and mixed electronic circuit

Wavelet analysis of current measurements for mixed-signal circuit testing

Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs

A low-jitter supply-regulated charge pump phase-locked loop with built-in test and calibration

Phase control of triangular stimulus generator for ADC BIST

Real-time multi-board architecture for analog spiking neural networks

Neural dynamics in reconfigurable silicon

A wafer-scale neuromorphic hardware system for large-scale neural modeling

Spike-based learning with a generalized integrate and fire silicon neuron

Overview: Memristive devices, circuits and systems

Biologically self-assembled memristive circuit elements

FPGA based on integration of memristors and CMOS devices

Hybrid CMOS/memristor circuits

Memristive transfer matrices for analog electronics

Capacitor bank design for wide tuning range LC VCOs: 850MHz-7.1GHz (157%)

On-chip biased voltage-controlled oscillator with temperature compensation of the oscillation amplitude for robust I/Q generation

A wide-band digitally controlled ring oscillator

Merged Digitally Controlled Oscillator and Time to Digital Converter for TV band ADPLL

Multi-standard/multi-band distributed VCO based on the "switched-cells tuning technique" for SDR applications

A codesign synthesis from an MPEG-4 decoder dataflow description

Digitally-controlled RF passive attenuator in 65 nm CMOS for mobile TV tuner ICs

Reconfigurable architecture design of motion compensation for multi-standard video coding

A high throughput VLSI design with hybrid memory architecture for H.264/AVC CABAC decoder

A reconfigurable multi-processor SoC for media applications

Fully integrated 500uW speech detection wake-up circuit

A new deflection shape function for square membrane CMUT design

A SAW-based liquid sensor with identification for wireless applications

Event-based 64-channel binaural silicon cochlea with Q enhancement mechanisms

Integrated low voltage and low power CMOS circuits for optical sensing of diffraction based micromachined microphone

A note on the dichotomy of limit sets for cooperative CNNs with delays

Retinal approaching object detector model implementation and validation

A camera based closed loop control system for keyhole welding processes: Algorithm comparison

Locally connected oscillatory networks acting as fully connected oscillatory networks

Cellular nanoscale network cell with memristors for local implication logic and synapses

A fully integrated dual band transceiver for IEEE 802.11a/b/g/j/n WLAN applications using hybrid up/down conversion architecture

Transceiver parameter detection using a high conversion gain RF amplitude detector

Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end

Low complexity compensation of frequency dependent I/Q imbalance and carrier frequency offset for direct conversion receivers

A fractional-N frequency synthesizer for cellular and short range multi-standard wireless receiver

A dual-mode neural stimulator capable of delivering constant current in current-mode and high stimulus charge in semi-voltage-mode

Hyperspectral reconstruction in biomedical imaging using terahertz systems

Sub-microwatt correlation integral processor for implantable closed-loop epileptic neuromodulator

A wirelessly-powered electro-acupuncture based on Adaptive Pulse Width Mono-Phase stimulation

Electric field focusing and shifting technique in deep brain stimulation using a dynamic tripolar current source

8×8-Bit multiplier designed with a new wave-pipelining scheme

A minimal-gate-count fully digital frequency-tracking oversampling CDR circuit

An improved RNS reverse converter for the ${2^{2n+1}−1, 2^{n}, 2^{n}−1}$ moduli set

Compact hardware architectures for BLAKE and LAKE hash functions

A scalable hardware/software co-design for elliptic curve cryptography on PicoBlaze microcontroller

A 1.2 Gb/s recursive polyphase cascaded integrator-comb prefilter for high speed digital decimation filters in 0.18-μm CMOS

Novel multiplierless wide-band CIC compensator

Reconfigurable nonuniform transmultiplexers based on uniform filter banks

A novel affine projection algorithm for superdirective microphone array beamforming

Robust response control with linear inequality matrix constraints for adaptive beamformer

Joint estimation and compensation for front-end imperfection in MB-OFDM UWB systems

A sideband-suppressed low-power synthesizer for 14-band dual-carrier MB-OFDM UWB transceivers

Comparison of time and frequency domain interpolation implementations for MB-OFDM UWB transmitters

Low-complexity tone reservation method for PAPR reduction of OFDM systems

Study on integrated transmission line ΣΔ modulators

An internally non-linear ADC for a ΣΔ accelerometer loop

Design techniques for discrete-time delta-sigma ADCs with extra loop delay

A new zero-optimization scheme for noise-coupled ΔΣ ADCs

Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs

McFIS: Better I-frame for video coding

An efficient motion vector coding algorithm based on adaptive predictor selection

Background modeling for video coding: From sprites to Global Motion Temporal filtering

Motion compensation for block-based lossless video coding using lattice-based binning

Transform-domain super resolution for improved motion-compensated prediction

A returned energy architecture for improved photovoltaic systems efficiency

A controller for wind generators to increase damping of power oscillations

Fuel cell MPPT for fuel consumption optimization

Current sourcing isolated grid connected inverter

An integrated four-port converter for compact and efficient hybrid power systems

A 1.5V low noise figure mixer for 3.5GHz WiMAX systems

Instantaneously companding baseband SC low-pass filter and ADC for 802.1 la/g WLAN receiver

An area efficient digital amplitude modulator in 90nm CMOS

Efficiency based design flow for fully-integrated class C RF power amplifiers in nanometric CMOS

A broadband 470–862 MHz direct conversion CMOS receiver

Optimized numerical mapping scheme for filter-based exon location in DNA using a quasi-Newton algorithm

Comparative genomic analysis using statistically optimal null filters

The relationship between music processing and electrocardiogram (ECG) in vegetative state (VS)

Data adaptive analysis of ECG signals for cardiovascular disease diagnosis

Time-constrained packet scheduling optimization for video streaming in wireless ad-hoc networks

Efficient packet scheduling for scalable video delivery to mobile clients

Cross-layer optimization for wireless streaming via adaptive MIMO OFDM

A cross-layer adaptation HCCA MAC for QoS-aware H.264 video communications over Wireless Mesh Networks

An EFOM for cross-layer optimization towards low-power and high-performance wireless networks

A 100/μA/Ch fully-integrable lock-in multi-channel frontend for infrared spectroscopic gas recognition

A single chip computational sensor system for gamma isotope identification

A frequency-based signature gas identification circuit for SnO2 gas sensors

RF inductive sensors for detection of change in the ionic strength and pH of liquid samples

An ISFET based sensing array with sensor offset compensation and pH sensitivity enhancement

EEG-based cognitive state monitoring and predition by using the self-constructing neural fuzzy system

Intelligent approach for PET volume analysis

A CNN approach to computing arbitrary Boolean functions

On passivity of delayed Markovian jump systems subject to parametric uncertainties

Dynamics of uncertain neutral stochastic neural networks with Markovian jumping and time-varying delays

Modeling Kita-Hon HVDC Link for load frequency control of Eastern Japan 50-Hz power system based on application of the CampusWAMS

An eigenvalue formulation for determining initial conditions of induction machines in dynamic power system simulations

Hardware prototype to emulate the dynamics of power system generators with field programmable analog arrays

Averaged-circuit modeling of line-commutated rectifiers for transient simulation programs

Simulation and analysis of distributed PV generation in a LV network using MATLAB-Simulink

A low-jitter video clock recovery circuit

A self-learning multiple-class classifier using multi-dimensional quasi-Gaussian analog circuits

Implementation of the MFCC front-end for low-cost speech recognition systems

Low-cost low-power bypassing-based multiplier design

Power analysis detectable watermarks for protecting intellectual property

Compact substrate models for efficient noise coupling and signal isolation analysis

Effect of body biasing on embedded SRAM failure

Networks-on-chip topology optimization subject to power, delay, and reliability constraints

Parallel sparse matrix solver for direct circuit simulations on FPGAs

Parallel-processing VLSI architecture for mixed integer linear programming

A simplified structure of second-order volterra filters for nonlinear acoustic echo cancellation

A modified TESPAR algorithm for wildlife sound classification

Quasi-periodic signal analysis using harmonic transform with application to voiced speech processing

Complexity-effective dynamic range compression for digital hearing aids

Improved wavelet based a-priori SNR estimation for speech enhancement

Analytical passive mixer power gain models

Detailed analyses in prediction of capacitive-mismatch-induced offset in dynamic comparators

Generation of active inductor circuits

Symmetry-aware analog layout placement design handling substrate-sharing constraints

Indefinite matrices of linear electrical circuits, their pseudoinverses, and applications in related fields

Design of a 70-MHz IF 10-MHz bandwidth bandpass ΣΔ modulator for WCDMA applications

A 100 µW Decimator for a 16 bit 24 kHz bandwidth Audio ΔΣ Modulator

A 13-bit, low-power, compact ADC suitable for sensor applications

A frequency-scalable 15-bit incremental ADC for low power sensor applications

Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics

Activity-driven, event-based vision sensors

High-DR frame-free PWM imaging with asynchronous AER intensity encoding and focal-plane temporal redundancy suppression

A compact-pixel tri-mode vision sensor

A signed spatial contrast event spike retina chip

Temporal contrast AER pixel with 0.3%-contrast event threshold

Recent theory and new applications in chaos communications

Feasibility of UWB radio: Impulse radio versus chaos-based approach

Design and simulation of a cooperative communication system based on DCSK/FM-DCSK

Performance evaluation of error-correcting scheme without redundancy code for noncoherent chaos communications

Performance analysis of differential chaos shift-keying over an m-distributed fading channel

Robust low power design in nano-CMOS technologies

Ultra-wide-band low noise amplifier using inductive feedback in 90-nm CMOS technology

Adiabatic SRAM with a shared access port using a controlled ground line and step-voltage circuit

A new substrate model and parameter extraction method for DNW RF MOSFETs

A forward body bias generator for digital CMOS circuits with supply voltage scaling

Selective redundancy-based design techniques for the minimization of local delay variations

Process variation compensation of a 4.6 GHz LNA in 65nm CMOS

Statistical NBTI-effect prediction for ULSI circuits

Design metrics for RTL level estimation of delay variability due to intradie (random) variations

Statistical delay modeling of read operation of SRAMs due to channel length variation

Cepstral smoothing of separated signals for underdetermined speech separation

A statistical analysis of the dual-mode CMA

A modified eigenvector method for blind deconvolution of MIMO systems using the matrix pseudo-inversion lemma

A signal perturbation free semi-blind MRT MIMO channel estimation approach

Blind channel estimation based robust physical layer key generation in MIMO networks

Low complexity adaptive step-size filtered gradient-based per-tone DMT equalisation

A multiplierless structure for direct digital IF signal synthesis

Scalable pipeline architecture of MMSE MIMO detector for 4×4 MIMO-OFDM receiver

Enhanced direction of arrival estimation via reassigned space-time-frequency methods

Image encryption using the reciprocal-orthogonal parametric transform

A reinforcement learning algorithm used in analog spiking neural network for an adaptive cardiac Resynchronization Therapy device

Active spike responses of analog electrical neuron: Theory and experiments

Self-Organizing Map with Weighted Connections avoiding false-neighbor effects

Log-Domain Time-Multiplexed Realization of Dynamical Conductance-Based Synapses

A study of exponential stability for stochastic delayed neural networks

An oversampling 2D sigma-delta converter by cellular neural networks

On computing multi-dimensional extreme eigen and singular subspaces

Bifurcations in simple genetic cyclic models

System-level design of low complexity CVNS feed forward neural network

Automatic circuit adjustment technique for process sensitivity reduction and yield improvement

Width-constrained wire sizing for non-tree interconnections

Fast simulation of interconnects with nonlinear loads using woodbury's formula

A spur-reduction frequency synthesizer for WIMAX applications

Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology

Technology remapping for engineering change with wirelength consideration

Dynamic IR drop estimation at gate level with standard library information

A highly efficient method for extracting FSMs from flattened gate-level netlist

Test application time minimization for RAS using basis optimization of column decoder

An accurate RTL power estimation considering power library unevenness

Super-resolution from observations with variable zooming ratios

Simultaneous deblocking and error concealment for decoded visual signal

Directional-edge-based object tracking employing on-line learning and regeneration of multiple candidate locations

Improved Block Truncation Coding using Optimized Dot Diffusion

An efficient area manipulation architecture for frequency domain encoding process

Improved method for blind estimation of the variance of mixed noise using weighted LMS line fitting algorithm

TV-based multi-scale super resolution using intra- and inter-scale correlations

Stereoscopic images generation with directional Gaussian filter

Human behavior recognition from arbitrary views

Pitch estimation of noisy speech signals using EMD-fourier based hybrid algorithm

Linear prediction of deterministic components in hybrid signal representation

Improved TDOA disambiguation techniques for sound source localization in reverberant environments

Robust speech recognition using feature-domain multi-channel bayesian estimators

Filterbank-based fast parallel algorithms for real-valued discrete gabor expansion and transform

A SPT treatment to the bit serial realization of the sign-LMS based adaptive filter

FPGA implementation of the MIMO-OFDM physical layer using single FFT multiplexing

Interval calculation of EM algorithm for GMM parameter estimation

Reduced memory architecture for CORDIC-based FFT

On the energy concentration property for zero-phase sequences

Realization of variable band-pass/band-stop IIR digital filters using Gramian-preserving frequency transformation

On the design of IIR digital filter using linearized equation systems

Digital notch filter with time-varying quality factor for the reduction of powerline interference

A novel technique for DCGA optimization of guaranteed BIBO stable IIR-based FRM digital filters over the CSD multiplier coefficient space

Power efficiency calculation of class E amplifier with nonlinear shunt capacitance

An area efficient fully monolithic hybrid voltage regulator

Freewheel duration adjustment circuits for charge-control single-inductor dual-output switching converters

Analysis and improvement of bilateral chopper having current resonant soft-switch

Design of a step-up dc-dc converter with on-chip coupled inductors

Control-to-output and duty ratio-to-inductor current transfer functions of peak current-mode controlled dc-dc PWM buck converter in CCM

A current-limiter-based soft-start scheme for linear and low-dropout voltage regulators

Analysis and design of a loss-free resistor based on a boost converter in PWM operation

DC-DC converter with ON-time control in pulse-skipping modulation

Variable-resolution simulation of nonlinear power circuits

On input-to-state stability notions for reachability analysis of power systems

Microgrid dynamics characterization using the automated state model generation algorithm

Interaction among voltage controlling devices and voltage control effect identification

Energy function based neural networks UPFC for transient stability enhancement of network-preserving power systems

Improved solar PV cell Matlab simulation model and comparison

Live Demo: ECOS 1.0: A metal-only ECO synthesizer

Live demonstration: Inductive power and telemetry for micro-implant

Live Demo: Affine arithmetic concept based Symbolic Circuit Analyser

Live demonstration: A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board

A real-time compensated inductive transceiver for wearable MP3 player system on multi-layered planar fashionable circuit board

Live demonstration: CASCADES. 1: A flow-graph-based symbolic analyzer

Live demonstration: Simulator-like exploration of cortical network architectures with a mixed-signal VLSI system

Simulator-like exploration of cortical network architectures with a mixed-signal VLSI system

Live demonstration: State-dependent sensory processing in networks of VLSI spiking neurons

State-dependent sensory processing in networks of VLSI spiking neurons

Live demonstration: Hardware and software infrastructure for a family of floating-gate based FPAAs

Hardware and software infrastructure for a family of floating-gate based FPAAs

An integrated wireless electronic nose system integrating sensing and recognition functions

Live demonstration: Spatial-temporal color video reproduction from noisy CFA sequence track: Digital signal processing

A concepts inventory for an attractive teaching approach of the mathematics of circuits and systems

A concept inventory for an Electric Circuits course : Rationale and fundamental topics

A set of questions for a concept inventory for a DC Circuits course

A first lab in filter design: Power line hum suppression in an ECG signal

A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers

Rail-to-rail low-power fully differential OTA utilizing adaptive biasing and partial feedback

Linear-in-dB Variable Gain Amplifier with PWL exponential gain control

Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency

Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers

A novel type-based group delay equalization technique

Beamforming using passive nested arrays of sensors

Fast Huffman decoding algorithm by multiple-bit length search scheme for MPEG-2/4 AAC

Super-resolution ToA estimation for indoor geolocation of wireless sensor networks using frequency hopping

Tracking by nonuniform amplitude division based LMS algorithm for time varying channels

Efficient algorithm for H.264/AVC intra frame transcoding

Fast block-size partitioning using empirical rate-distortion models for MPEG-2 to H.264/AVC transcoding

Learn to segment attention object from low DoF image

A new method for segmentation of noisy, low-contrast image sequences

A directional extension of the JPEG image codec

Performance analysis of 3D-IC for multi-core processors in sub-65nm CMOS technologies

Combining circuit and packet switching with bus architecture in a NoC for real-time applications

A 100-context optically reconfigurable gate array

Chip-to-chip communications using capacitive interconnects

Monitoring and reconfiguration techniques for power supply variation tolerant on-chip links

Efficient simulation model for DAC dynamic properties

TLM2.0 based timing accurate modeling method for complex NoC systems

A reconfigurable OFDM inner receiver implemented in the CAL dataflow language

A new sampling method for analog behavioral modeling

Multiobjective optimization with an asymptotically uniform coverage of Pareto front

Minimized right-half plane zero effect on fast boost DC-DC converter achieved by adaptive voltage positioning technique

Zero-derivative method of analog controller design applied to step-down DC-DC converters

Minimum hardware serial PID regulator for high efficiency, low power digital DC-DC converters

A frequency domain approach for controlling chaos in switching converters

Bifurcation behavior of a boost converter under voltage controlled pulse skipping modulation in the light of 1-D discontinuous map model

A mini-invasive multi-function biomedical pressure measurement system ASIC

A wireless neural/EMG telemetry system for freely moving insects

A high-gain impedance matching technique for efficient power harvesting of passive wireless microsystems

A multiband concurrent sampling based RF front end for biotelemetry applications

Wireless integrated circuit for the acquisition of electrocorticogram signals

A (256×256) pixel 76.7mW CMOS imager/ compressor based on real-time In-pixel compressive sensing

Low bandwidth decoder framework for H.264/AVC scalable extension

Low-cost hardware architecture design for 3D warping engine in multiview video applications

Video-Active RAM: A processor-in-memory architecture for video coding applications

A low-power VLSI implementation for variable block size motion estimation in H.264/AVC

Least-squares adaptation of affine combinations of multiple adaptive filters

An Improved Exponentiated stochastic gradient algorithm

Reduced-rank BEACON algorithm based on joint iterative optimization of adaptive filters

Lyapunov-based stability analysis of supervised and unsupervised adaptive algorithms

Color video denoising based on adaptive color space conversion

A 5-GHz fractional-N phase-locked loop with spur reduction technique in 0.13-μm CMOS

Direct DDFS FM modulator with baseband interpolator

A 10Mb/s 4ns jitter direct conversion low Modulation Index FSK demodulator for low-energy body sensor network

Phase amplitude converter with conditional shift operation

System level power optimizations for EPC RFID tags to improve sensitivity using load power shaping and operation scheduling

A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing

Enhancement of comparator operation speed by using negative-differential-resistance devices

A fine-resolution Time-to-Digital Converter for a 5GS/S ADC

INL based dynamic performance estimation for ADC BIST

Linearity testing of ADCs using low linearity stimulus and Kalman filtering

An overview of directional transforms in image coding

Decoding of directional DCT-coded images: A total variational approach with directionality

Direction scalability of adaptive directional wavelet transform: An approach using block-lifting based DCT and SPIHT

Image coding via sparse contourlet representation

Digital camera identification using Colour-Decoupled photo response non-uniformity noise pattern

Accurate detection of out-of-control variations from digital camera devices

Intrinsic signatures for scanned documents forensics : Effect of font shape and size

New developments in color image tampering detection

A forensic chip for secure digital video recording

Waveform speech coding using multiscale recurrent patterns

Another look at the retina as an image scalar quantizer

Massively parallel processing of signals in dense microphone arrays

On the compression of ECG records employing triangular elements and analysis-by-synthesis modeling

A full-scale CMOS voltage-to-frequency converter for WSN signal conditioning

A low power interface circuit for resistive sensors with digital offset compensation

A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks

A ΔΣ ADC for low power sensor applications

A wearable, wireless electronic interface for textile sensors lin shu

Robust distributed beamforming for two-way wireless relay systems

Pilot-aided designs of memoryless block equalizers with minimum redundancy

Compressive sampling hardware reconstruction

Low memory cost bilateral filtering using stripe-based sliding integral histogram

Local polynomial modelling of time-varying autoregressive processes and its application to the analysis of event-related electroencephalogram

Current-limited passive charge recovery for implantable neuro-stimulators: Power savings, modelling and characterisation

A 24nW, 0.65-V, 74-dB SNDR, 83-dB DR, class-AB current-mode sample and hold circuit

A silicon pancreatic islet for the treatment of diabetes

A fully integrated multi-channel impedance extraction circuit for biosensor arrays

Towards an adaptive modified quasi-tripole amplifier configuration for EMG neutralization in neural recording tripoles

A new modified nodal analysis for nano-scale memristor circuit simulation

A novel scalable parallel architecture for biological neural simulations

Genetic algorithm based topology generation for application specific Network-on-Chip

FAST: A simulation framework for solving large-scale probabilistic inverse problems in nano-biomolecular circuits

Rapid design space exploration for multi parametric optimization of VLSI designs

A memory mapping approach for parallel interleaver design with multiples read and write accesses

Improving redundancy addition and removal using unreachable states for sequential circuits

A framework for fast design space exploration using fuzzy search for VLSI computing Architectures

Register relocation to optimize clock network for multi-domain clock skew scheduling

Analysis and design of a step-down switched-capacitor-based converter for low-power application

A switched-capacitor inverter using series/parallel conversion

A new visit to an old problem in switched-capacitor converters

An enhanced switching policy for buck-derived multi-level switching power amplifiers

Effect of MOSFET gate-to-drain parasitic capacitance on class-E power amplifier

Analysis of layout density in FinFET standard cells and impact of fin technology

Methodology for multi-layer interdigitated power and ground network design

A clock network of distributed ADPLLs using an asymmetric comparison strategy

A 1-change-in-4 delay-insensitive interchip link

Optimization of clock-gating structures for low-leakage high-performance applications

Power-aware NoC router using central forecasting-based dynamic virtual channel allocation

An efficient routing algorithm for irregular mesh NoCs

Communication-aware application mapping and scheduling for NoC-based MPSoCs

Improving the performance of deadlock recovery based routing in irregular mesh NoCs using added mesh-like links

Asynchronous BFT for low power networks on chip

Correcting unsynchronized zoom in 3D video

Depth maps interpolation from existing pairs of keyframes and depth maps for 3D video generation

Image-based rendering of ancient Chinese artifacts for multi-view displays — a multi-camera approach

Dynamic clipping ratio determination for global backlight dimming in LCD

An organic complementary differential amplifier for flexible AMOLED applications

Drive and sense interface for gyroscopes based on bandpass sigma-delta modulators

An amplitude regulation for gyroscope drive loops based on phase-shifting

A tuning procedure for the electric networks of PEM systems

A MEMS-based temperature-compensated vacuum sensor for low-power monolithic integration

A low-noise high-sensitivity readout circuit for MEMS capacitive sensors

Recent advances in IR-UWB transceivers: An overview

Challenges and recent advances in IR-UWB system design

Partially coherent signal combination for impulse radio synchronisation

IR-UWB transmitters synthesized from standard digital library components

System and circuit considerations for low-complexity constant-envelope FM-UWB

Digital architectures implementing piecewise-affine functions: An overview

On the synthesis of piecewise affine control laws

PWL cores for nonlinear array processing

An automated design flow from linguistic models to piecewise polynomial digital circuits

Multicore thermal management using approximate explicit model predictive control

ATAC: Improving performance and programmability with on-chip optical networks

Run-time mapping of applications on FPGA-based reconfigurable systems

High level specification of embedded listeners for monitoring of Network-on-Chips

3D NoCs — Unifying inter & intra chip communication

Automated placement of reconfigurable regions for relocatable modules

A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding

An ultra low-energy DAC for successive approximation ADCs

Multi-rate segmented time-interleaved current steering DAC with unity-elements sharing

Output impedance linearization technique for current-steering DACs

Linearity enhancement in Digital-to-Analog Converters using a modified decoding architecture

Hardware-efficient image enhancement with bilateral tone adjustment

Shadow removal from natural images

Subtractive impairment, additive impairment and image visual quality

Saturated-pixel enhancement for color images

IN-service video quality monitoring

A phase model approach for synchronization analysis of coupled nonlinear oscillators

On the synchronization condition of second-harmonic coupled QVCOs

Magnetic (RL-) multivibrator using transconductance amplifier

Spur reduction in wideband PLLs by random positioning of charge pump current pulses

A background KDCO compensation technique for constant bandwidth in all-digital phase-locked loop

SOS current mirror matching at 4K: A brief study

Mismatch compensation of a subthreshold CMOS current normalizer

Double-via insertion enhanced X-architecture clock routing for reliability

2×VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process

A 125-MHz wide-range mixed-voltage I/O buffer using gated Floating N-well circuit

Is physics-based liveness detection truly possible with a single image?

Unsupervised classification of digital images using enhanced sensor pattern noise

Occluded human body segmentation and its application to behavior analysis

Unsupervised action classification using space-time link analysis

Accurate playfield detection using Area-of-Coverage

Impact of network sparsity on strategic placement of phasor measurement units with fixed channel capacity

Joint optimal placement of PMU and conventional measurements in power systems

Boundary properties of the BCU method for power system transient stability assessment

A multi-objective meta-heuristic method for distribution network optimization

Multi-agent design for power distribution system reconfiguration based on the artificial immune system algorithm

Comparision of methods for interference neutralisation in tripolar nerve recording cuffs

Performance comparison of low current measurement systems for biomedical applications

Design of a configurable neural Data compression system for intra-cortical implants

Low-power low-complexity carrier-based UWB transmitter in 90nm CMOS for wireless biomedical radar sensing applications

Stimulation management for a multichannel vestibular neural prosthesis

A 16Kb 10T-SRAM with 4x read-power reduction

Implementation of adaptive grain signatures for transactional memories

Fast low power translation lookaside buffers using hierarchical NAND match lines

Scalability of weak consistency in NoC based multicore architectures

Sense amplifier with offset mismatch calibration for sub 1-V DRAM core operation

On design of robust ℋ∞ filters for uncertain Markovian stochastic systems

Unsupervised identification of nonstationary dynamical systems using a Gaussian mixture model based on EM clustering of SOMs

Compressive sensing of localized signals: Application to Analog-to-Information conversion

Low rank approximation of a set of matrices

Robust signal recovery approach for compressive sensing using unconstrained optimization

ZF-DFE transceiver for time-varying MIMO channels with channel-independent temporal precoder

VLSI implementation of a quasi-ml, energy efficient fixed complexity sphere decoder for MIMO communication system

A best-first tree-searching approach for ML decoding in MIMO system

List based soft-decision MIMO detection by the MCTS algorithm

VLSI implementation of a hardware-optimized lattice reduction algorithm for WiMAX/LTE MIMO detection

Novel programmable built-in current-sensor for analog, digital and mixed-signal circuits

Two-tone PLL for on-chip IP3 test

Scan based process parameter estimation through path-delay inequalities

An on-chip waveform capturing technique pursuing minimum cost of integration

A cyclic vernier time-to-digital converter synthesized from a 65nm CMOS standard library

On the baseband hardware complexity of modernized GNSS receivers

RFID-based positioning for building management systems

A Slope-Based Multipath Estimation technique for mitigating short-delay multipath in GNSS receivers

Design for test of a low power multi-standard GPS/GALILEO RF front-end

Event-driven, continuous-time ADCs and DSPs for adapting power dissipation to signal activity

Targeting ultra-low power consumption with non-uniform sampling and filtering

Adaptive signal acquisition and wireless power transfer for an implantable prosthesis processor

Analysis of ultralow-power asynchronous ADCs

Rationale for optical interconnect

State of the art in optical interconnect technology

Tools and methodologies for designing energy-efficient photonic networks-on-chip for highperformance chip multiprocessors

Optical network-on-chip reconfigurable model for multi-level analysis

A system-level exploration flow for optica network on chip (ONoC) in 3D MPSoC

Switched-resistor tuning technique for highly linear Gm-C filter design

Analysis of the common-mode induced differential-mode distortion in Gm-C filters

Bandwidth-enhancement gm-C filter with independent ωO and Q tuning mechanisms in both topology and control loops

Source-follower-based bi-quad cell for continuous-time zero-pole type filters

A compensation technique for compact low-voltage low-power active-RC filters

An adaptive speed function of level set method for moving object extraction

Subpixel-based down-sampling via Min-Max Directional Error

Improved mode selection in hybrid error concealment for multi-broadcast-reception

A new motion vector composition algorithm for fast-forward video playback in H.264

Optimized inpainting-based macroblock prediction in video compression

AMS and RF design for reliability methodology

Fast algorithms for power grid analysis based on effective resistance

Scaling analysis of yield optimization considering supply and threshold voltage variations

Signal integrity verification of coupled interconnect lines using efficient eye-diagram determination

Monte-Carlo-based statistical soft error rate (SSER) analysis for the deep sub-micron era

Efficient discovery of unknown ads for audio podcast content

Extraction of robust visual phrases using graph mining for image retrieval

High-level knowledge inference for human image classification in multimedia retrieval

Audio onset detection using energy-based and pitch-based processing

Video activity detection using compressed domain motion trajectories for H.264 videos

Analysis and implementation of a DC-DC step-down converter for low output-voltage and high output-current applications

Three-phase single-stage AC-DC converters

Two-switch flyback-forward PWM DC-DC converter with reduced switch voltage stress

Dual modulation technique for high efficiency in high switching buck converters over a wide load range

Design and implementation of high frequency AC-LED driver with digital dimming

DSTN sleep transistor sizing with a new approach to estimate the maximum instantaneous current

Power characteristics of Networks on Chip

Multi-objective optimization for Networks-on-Chip architectures using Genetic Algorithms

Efficient partitioning technique on multiple cores based on optimal scheduling and mapping algorithm

Distinguishable error detection method for Network on Chip

Efficient memory management for FFT processors

Parallel scalable hardware architecture for hard Raptor decoder

VLSI implementation of a low-complexity LLL lattice reduction algorithm for MIMO detection

Impact of module design on the signal-isolation of mixed-signal RF applications

Low-cost class caching mechanism for Java SoC

Continuous-time CMOS quantizer for ultra-wideband applications

Performance improvement of autocorrelation detector used in UWB impulse radio

A sign-bit auto-correlation architecture for fractional frequency offset estimation in OFDM

Rapid design and prototyping of universal soft demapper

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A cochlear heterodyning architecture for an RF fovea

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Residue arithmetic bases for reducing delay variation

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Error control integration scheme for reliable NoC

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An analytical model for self-capacitance in high performance integrated circuits

Analysis and test of electromigration failures in FPGAs

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Efficient SIMD-based implementation of adaptive filter

Adaptive quantization parameter cascading for hierarchical video coding

Error resilient scalability for video bit-stream over heterogeneous packet loss networks

Prediction-based adaptive transform coefficients scanning for inter-frame video coding

Adaptive spatial prediction in intra coding

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A novel MUX-FF circuit for low power and high speed serial link interfaces

2009 IEEE International Symposium on Circuits and Systems

2008 IEEE International Symposium on Circuits and Systems

2007 IEEE International Symposium on Circuits and Systems

2006 IEEE International Symposium on Circuits and Systems

2005 IEEE International Symposium on Circuits and Systems

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.

The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003.

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

Tutorial Guide. ISCAS 2001. IEEE International Symposium on Circuits and Systems (Cat. No.01TH8573)

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)

ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187)

Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97

1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94

1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

1991., IEEE International Sympoisum on Circuits and Systems

IEEE International Symposium on Circuits and Systems

IEEE International Symposium on Circuits and Systems,

1988., IEEE International Symposium on Circuits and Systems

Analysis of ultralow-power asynchronous ADCs

Content Provider	IEEE Xplore Digital Library
Author	Balasubramanian, V. Heragu, A. Enz, C.
Copyright Year	2010
Description	Author affiliation: Ecole Polytechnique Federale de Lausanne (EPFL), Lausanne, Switzerland (Balasubramanian, V.; Heragu, A.; Enz, C.)
Abstract	In this paper, analysis of a novel class of A/D converters based on asynchronous delta modulation (DM) is presented and a high level model is realized for the same. Using the high level model, analytical expressions are derived for the calculation of the inband signal-to-quantization noise ratio (SQNR) for the case of sinusoidal inputs and two-tone inputs. For the special case of sinusoidal inputs, an empirical formula is also derived for calculating the inband SQNR. The derived analytical and empirical expressions are verified using high level simulations and the simulation results are presented finally.
Starting Page	3593
Ending Page	3596
File Size	341084
Page Count	4
File Format	PDF
ISBN	9781424453085
DOI	10.1109/ISCAS.2010.5537806
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-30
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delta modulation Pulse width modulation Digital filters Space vector pulse width modulation Finite impulse response filter Logic Analytical models Energy consumption Signal sampling Digital modulation
Content Type	Text
Resource Type	Article

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