NDLI: A packet-based emulating platform with serializer/deserializer interface for heterogeneous IP verification

Content Provider	IEEE Xplore Digital Library
Author	Chih-Hsing Lin Yung-Chang Chang Wen-Chih Huang Wei-Chih Lai Ching-Te Chiu Jen-Ming Wu Shuo-Hung Hsu Chun-Ming Huang Chih-Chyau Yang Shih-Lun Chen
Copyright Year	2010
Description	Author affiliation: Department of Computer Science National Tsing Hua University, Hsin-Chu, Taiwan (Yung-Chang Chang; Wen-Chih Huang; Wei-Chih Lai; Ching-Te Chiu) \|\| Institute of Communications Engineering, National Tsing Hua University, Taiwan (Chih-Hsing Lin; Jen-Ming Wu; Shuo-Hung Hsu) \|\| National Chip Implementation Center (CIC), Hsinchu, Taiwan (Chun-Ming Huang; Chih-Chyau Yang; Shih-Lun Chen)
Abstract	This paper proposes a packet-based verification platform with serial link interface for emulating the hardware of the heterogeneous IPs before tape out. With the serial link interface Serializer/Deserializer (SerDes) added between IPs, significant amount of pin counts can be reduced in the platform. An adapter is inserted between IP and SerDes to convert parallel bus into packets and handle the handshaking. Under our proposed adapter architecture and handshaking scheme, the limitation on the number of the master adapter is eliminated compared with Bus-based Advanced High-performance Bus (AHB) architecture. Simulation results show the data transfer through our proposed architecture works correctly without the limitation on the number of masters. With the proposed adapter and SerDes architecture, the number of required signals in the interconnect is reduced from 79 to two for the AHB bus.
Starting Page	1061
Ending Page	1064
File Size	2006533
Page Count	4
File Format	PDF
ISBN	9781424453085
DOI	10.1109/ISCAS.2010.5537351
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-30
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Routing Design methodology Communication system control Switches Electronic design automation and methodology Random access memory Computer science Signal processing Costs
Content Type	Text
Resource Type	Article

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