NDLI: Nonvolatile SRAM cell based on CuO

Please wait, while we are loading the content...

2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology

2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

The future of CMOS scaling - parasitics engineering and device footprint scaling

Air spacer MOSFET technology for 20nm node and beyond

Scaling study of nanowire and multi-gate MOSFETs

Prediction of channel thermal noise in twin silicon nanowire MOSFET (TSNWFET)

Thermal stability of a high performance PTGVMOS with native-tie

Novel vertical sidewall MOSFETs with embedded gate

Investigations on the performance limits of the IMOS transistor

Silicon nanowire CMOSFETs : Fabrication, characteristics, and memory application

Low dissipation nanoscale transistor physics and operations

Status and trends in nanoscale Si-based devices and materials

Road-blocks to Tera-level nanoelectronics

CMOS gate height scaling

Extraction of voltage transfer characteristic of inverter based on TSNWFETs

An experimental study on carrier transport in silicon nanowire transistors: How close to the ballistic limit?

Investigation of mobility in twin silicon nanowire MOSFETs (TSNWFETs)

Novel MOSFET structures for RF applications

The impact of substrate bias on RTS and flicker noise in MOSFETs operating under switched gate bias

Strain influence on analog performance of single-gate and FinFET SOI nMOSFETs

Noise in nano-scale MOSFETs and flash cells

CMOS-NDR transistor

32nm Node Si and $Si_{1−x}Ge_{x}$ SOI coplanar N channel “Vertical Dual Carrier Field Effect Transistor” for small signal mixed signal and communication applications

The state-of-the-art mobility enhancing schemes for high-performance logic CMOS technologies

Process characterization for strained Si on SOI CMOS devices

A theoretical study Of electrostatic properties Of 〈100〉 uniaxially strained silicon n-channel MOSFET

Scaling of Strain-induced Mobility Enhancements in Advanced CMOS Technology

Stress engineering in (100) and (110) nMOSFETs

Stress engineering for 32nm CMOS technology node

SMT and enhanced SPT with recessed SD to improve CMOS device performance

Towards ultimate CMOS performance with new stressor materials

Influence of surface orientation on electrical characteristics in MOSFETs with slightly tilted off-axis channel

The impact of stain technology on FUSI gate SOI CMOSFET and device performance enhancement for 45nm node and beyond

Strained silicon dynamic threshold voltage MOSFETs for low voltage and ultra high speed CMOS circuits

Towards Schottky-barrier source/drain MOSFETs

Dopant-segregated source/drain technology for high-performance CMOS

Schottky-barrier height tuning of Ni and Pt germanide/n-Ge contacts using dopant segregation

A comprehensive study on Schottky barrier nanowire transistors (SB-NWTs): Principle, physical limits and parameter fluctuations

Impact factors on the performance of Schottky barrier MOSFETs with asymmetric barrier height at source/drain

REBULF technology for bulk silicon and SOI lateral high-voltage devices

On-state resistance improvement by partially slotted STI LDMOS transistor in 0.25-micron smart power technology

The multi-emitter Si/SiGe HBT for microwave power application

Improved thermal stability in SiGe HBTs by emitter layout

A Fermi Level Controlled High Voltage Transistor preventing subthreshold hump

Thick field-oxide high-voltage PMOS in BCD technology for PDP scan driver IC

Research on SiGeC power diodes with fast and soft recovery

New Lateral IGBT on partial membrane

Investigation of the RESURF Dielectric Inserted (REDI) LDMOS as a novel silicon-based RF power device

A research for BCD compatible technology

Bulk silicon CDMOS technology for an advanced PDP data drvier IC

From ultimate to beyond NanoCMOS

Source/Drain junction integration issues in submicron Ge MOSFETs

Estimation of process variation impact on DG-FinFET device performance using Plackett-Burman design of experiment method

The influence of the source/drain-tie length in a novel self-aligned S/D tie SOI for improving self-heating

High performance and highly stable ultra-thin oxynitride for CMOS applications

Misalignment issue between the si-body and the gate of a 30nm bSPIFET

Fabrication of improved FD SOIMOSFETs for suppressing edge effect

Analysis of breakdown characteristics of 40nm PD SOI NMOS device considering STI-induced mechanical stress effect

Nature of breakdown in ultrathin gate dielectrics

Low-frequency current fluctuations in post-hard breakdown thin silicon oxide films

Defect current and defect band conduction of ultrathin oxides after degradation and breakdown

Plasma-process induced damage on 65nm logic VLSI manufacturing

Fast method to identify the root cause for ILD Vbd fail

Compact modeling of multiple-gate MOSFETs

An analytical model for carrier recombination and generation lifetimes measurement in SOI MOSFET’s

Off-state leakage current modeling in low-power/high-performance partially-depleted (PD) floating-body (FB) SOI MOSFETs

RF modeling of integrated RF CMOS Schottky diodes for rectifier designs

Balanced truncation on empirical gramians for model-order-reduction of Non-Quasi-Static effects in MOSFETs

An efficient compact model for LDMOS with self-heating effects

Modeling of the turn-on characteristics of poly-silicon thin-film transistors with considering kink effect

Modeling of the effective mobility for polysilicon thin film transistor

Unified regional modeling approach to emerging multiple-gate/nanowire MOSFETs

A complete surface potential-based current-voltage and capacitance-voltage core model for undoped surrounding-gate MOSFETs

A conduction model for intrinsic polycrystalline silicon thin-film transistor based on energy-dispersed trap states at discrete grain boundary

HiSIM-HV: A compact model for simulation of high-voltage-MOSFET circuits

High-voltage MOSFET modeling and simulation considerations

Extraction of speculative SOI MOSFET models using self-heating-free targets

The new analytical subthreshold behavior model for dual material gate (DMG) SOI MESFET

RF MOST modeling based on PSP

Electrostatic discharge (ESD) and technology Scaling: The future of ESD protection in advanced technology

Electrostatic discharge protection framework for mixed-signal high voltage CMOS applications

CDM ESD failure modes and VFTLP testing for protection evaluation

Analysis of metal routing technique in a novel dual direction multi-finger SCR ESD protection device

An investigation of single- and multi-finger nMOSFETs for the output pin ESD protection in integrated circuits

A novel ESD protection circuit applied in high-speed CMOS IC

Contact Block Reduction method for ballistic quantum transport with semi-empirical $sp^{3}d^{5}s*$ tight binding band models

First-principles study of Schottky barrier formation of a semiconducting carbon nanotube-metal contact

GaAs-GaP core-shell nanowire transistors: A computational study

Statistical variations in 32nm thin-body SOI devices and SRAM cells

Monostable-bistable transition logic element (MOBILE) model for single-electron transistors

A numerical method to simulate THz-wave generation and detection of field-effect transistors

Investigations on the physical understanding of mobility in MOSFETs - from drift-diffusion to quasi-ballistic

Automated design of random dopant fluctuation resistant MOSFETs

3-D simulation of geometrical variations impact on nanoscale FinFETs

Nanoelectronic device simulation using extended Hückel theory (EHT) and NEGF

Advances in spherical harmonics solvers for the Boltzmann equation

Current transport in carbon nanotube transistors

Graphene nanoribbons FETs for high-performance logic applications: Perspectives and challenges

Harmonic distortion in MOSFETs calculated by successive integration of the transfer characteristics

Simulation of time-dependent transport in nanoscaled devices

Simulation of magnetotransport in nanoscale devices

The driftless and electron-windless electromigration theory

Critical current (I) based SPICE model extraction for SRAM cell

A simple procedure to determine source/drain series resistance and effective channel length for advanced MOSFETs

Thermal analysis of ICs based on equivalent thermal resistance

Statistical prediction of NBTI-induced circuit aging

Modeling the gate current 1/f noise and its application to advanced CMOS devices

Directed Genetic algorithms for OTFT model parameter extraction

On integration-based methods for MOSFET model parameter extraction

The development of integration-based methods to extract parameters of two-terminal device models

Advanced spice modeling for 65nm CMOS technology

Impact of NBTI on the performance of 35nm CMOS digital circuits

Dynamic-Adaptive Field Induced Charged Device Model (FICDM) compact tester model

2-D modeling of nanoscale multigate MOSFETs

Circuit simulations with uncertainties using affine arithmetic and piecewise affine statemodels

Modeling of on-chip spiral inductors with a center-tap

Impact of gate misalignment on the performance of dopant-segregated Schottky Barrier MOSFETs

Phase change memory cell design by thermal analysis with finite element simulation

Electrothermal coupling and threshold-switching simulation study on phase change memory (PCM) Cell

A study of advanced modeling methodology of CMOS-compatible RF-MEMS devices for integrated circuit design

Global scaling inductor models with temperature effect

Design and simulation of on-chip magnetic inductors for RF ICs

A new MOS varactor BSIM4 model with temperature effect

Piezomobility description of strain-induced mobility

Simulation of charge trapping memory with novel structures

Error correction and parasitics de-embedding for on-wafer transistor S-parameter measurements using 4-port techniques

Thermal noise performance in recent CMOS technologies

The bipolar theory of the Bipolar Field-Effect Transistor: Recent advances

High performance MOSFET scaling study from bulk 45 nm technology generation

Random doping fluctuation effects on static noise margins of 6-T SRAM cells

Verilog-A model for phase change memory simulation

Analysis of carbon-based interconnect breakdown

The application of carbon nanotubes in CMOS integrated circuits

Analysis of carbon-based interconnect breakdown

Fabrication and DC current-voltage characteristics of real space transfer transistor with dual-quantum-well channel

Reconfigurable single-electron transistor logic gates

The design, fabrication and characterization of GaAs-based RTT with groove and self-aligned Schottky gate structure

Extended Toffoli gate implementation with photons

The application of carbon nanotubes in CMOS integrated circuits

Wafer-scale processing of aligned carbon nanotubes for future integrated circuits

Carbon nanotube via interconnects with large current carrying capacity

Comparison of spintronics and nanoelectronics for information processing

Electronic quantum-dot cellular automata

Temperature dependent transport in nanotube bioconjugates

Emerging transport behavior in manganites wires

Performance variation adaptive differential signaling via Carbon Nanotube bundles

Nano silicide formation in nano Si wires

Carbon nanotubes for potential electronic and optoelectronic applications

Integration of carbon nanotubes in microelectronics

Theoretical and experimental results of a fully ballistic nano-FET with high gain

ZnO nanorods on plastic substrate from zinc nitrate hexahydrate and hexamethylenetetramine solution

High temperature synthesis of In-doped ZnO nano-structures on InP (001) substrate by pulsed laser deposition

Theoretical investigation into I–V characteristics of the benzene-molecular system

Issues and controversies in NBTI degradation and recovery mechanisms for p-MOSFETs with SiON gate dielectrics

Degradation of metal induced laterally crystallized n-type polysilicon TFTs under dynamic gate voltage stresses

FinFET reliability study by forward gated-diode method

Characteristics of NBTI in pMOSFETs with thermally and plasma nitrided gate oxides

Design trends and challenges of logic soft errors in future nanotechnologies circuits reliability

Investigations on proton-irradiation-induced spacer damage in deep-submicron MOSFETs

New method to evaluate the total dose radiation effect of MOS devices

Recent progress in understanding the instability and defects in gate dielectrics

Factors for negative bias temperature instability improvement in deep sub-micron CMOS technology

Gate insulator process dependent NBTI in SiON p-MOSFETs

The transient behavior of NBTI - a new prospective

Comprehensive study of bias temperature instability on polycrystalline silicon thin-film transistors

CDM protection of high voltage LDMOS for automotive applications

Characteristics of as-grown hole trapping in silicon oxynitride p-MOSFETs subjected to negative bias temperature stress

Recovery characteristics of NBTI of pMOSFETs with oxynitride dielectrics under drain bias

Fabrication and characteristics of Germanium-On-Insulator substrates

Ferroelectric properties of BiFe thin film formed on Pt electrodes

Enhanced ferroelectric properties of BiFeO multilayer capacitors at room temperature applied in dielectric devices

UHV STM AND LEED studies of the nucleation and growth of Ge thin films on Si(113) substrates

Operational optimization of GaN thin film growth employing numerical simulation in a showerhead MOCVD reactor

High quality AlGaN grown on GaN template with HT-AlN interlayer

Crystalline quality of InN with different indium contents around lattice-matched to GaN

Morphology and microstructure evolution of AlN epilayers grown on GaN/sapphire templates with AlN interlayers observed by transmission electron microscopy

Low resistance Ti/Al/Ni/Au Ohmic contact to (NH treated n-type GaN for high temperature applications

Growth and characterization of Si/SiN/SiC structures by APCVD process

Synthesis of indium phosphide polycrystalline

Current status and possibilities of wafer-bonding-based SOI technology in 45nm or below CMOS LSIs

Improvement of the crystallinity and optical properties of sol-gel ZnO thin film by a PVD ZnO buffer layer

Physical and optical properties of ZnO thin films grown by DC sputtering deposition

Structure and magnetic properties of Co-doped TiO nanotubes by aqueous solution method

Study on CdZnTe crystal growth parameters optimization

Oxidized layer of CdZnTe studied by C-V characteristics

Evolution of wetting layers in InAs/GaAs quantum-dot system studied by reflectance difference spectroscopy

Strain and surface roughness control of SiGe layer deposited by ion beam sputtering

Process strain induced by nickel germanide on (100) Ge substrate

Local strain evaluation for freestanding Si membranes by microphotoluminescence using UV laser excitation

Atomically-controlled FeSi/Ge hybrid structures for group-IV-semiconductor spin-transistor application

Effect of AlN interlayer thickness on leakage currents in Schottky contacts to AlN/AlN/GaN heterostructures

High epitaxial growth rate of 4H-SiC using TCS as silicon precursor

Fabrication of silicon-on-insulator (SOI) and high-k materials using plasma technology

Low temperature poly-germanium growth process on insulating substrate using palladium-induced lateral crystallization

The difference of chemical binding states between ultra shallow plasma doping (PD) and ion implantation (I/I) samples by using hard X-ray photoelectron spectroscopy (HX-PES)

Piezoresistive linearity analysis of polysilicon nanofilms deposited at different temperatures based on interstitial-vacancy model

Surface and interfacial properties of the ultra-thin HfO gate dielectric deposited by ALD

Properties of high-dielectric constant complex materials based on transition and rare-earth metal oxides

Optical characteristics and UV modification of low-k materials

Advanced silicon and silicon-based materials for fast transition from micrometer- to nanometer-scale integrated-circuit technology

Surfaces and interfaces for controlled defect engineering

Impurity effect on internal gettering in Czochralski silicon

Fabrication of high-k gate dielectrics using plasma oxidation and subsequent annealing of Hf/SiO/Si structure

Improvement of dielectric properties of ZrO films prepared by limited reaction sputtering

Characterization of low-dielectric-constant SiCON films grown by PECVD under different RF power

A critical review of charge-trapping NAND flash devices

Embedded erase failure in NOR flash EEPROM memory

Performance improvement of flash memory with a novel quasi-SOI structure

Improved high temperature retention and endurance in HfON trapping memory with double quantum barriers

NAND flash read/write cache directions for the personal computing platform

Cell devices for high-density flash memory

Technologies and materials for memory with full compatibility to CMOS

Scaling of Stacked gate technology for embedded NVM

Memory evolution: Multi-functioning Unified-Random Access Memory (URAM)

SONOS type memory cell with ALD LaAlO blocking oxide for high speed operation

A novel floating gate engineering technique for improved data retention of flash memory devices

FEDRAM: A capacitor-less DRAM based on ferroelectric-gated field-effect transistor

Modeling and analysis of effect on bit-line voltage caused by imprint in FeRAM

Characteristics of sub-100nm ferroelectric field effect transistor with high-k buffer layer

Development of three-dimensional MOS structures from trench-capacitor DRAM cell to pillar-type transistor

Characteristics of inorganic and organic ferroelectric thin films for memory applications

CMOS-compatible zero-mask One Time Programmable (OTP) memory design

Buffer layer dependence of B (BNdT) based MFIS capacitor for FeFET application

Nonvolatile SRAM cell based on CuO

Analysis of contact resistance effect to SRAM performance in deep sub-micron technology

A novel zero-aware read-static-noise-margin-free SRAM cell for high density and high speed cache application

A novel circuit scheme and analysis for three-level feram

Challenge of nanoelectronic materials and devices toward new nonvolatile memories

Comparison of PN diodes and FETs as Phase Change Memory (PCM) driving devices

The parasitic effects induced by the contact in RRAM with MIM structure

Bistable resistive switching of pulsed laser deposited polycrystalline La films

Understanding the resistance switching mechanisms of binary metal oxides with the percolation model

Ionic memory - materials and device characteristics

Resistive switching characteristics of metal oxide for nonvolatile memory applications

Excellent resistive switching characteristics of Cu doped ZrO and its 64 bit cross-point integration

Characteristics of a highly scalable bridge phase change memory

Si-based two-terminal resistive switching nonvolatile memory

Enhancement of endurance for CuO based RRAM cell

Resistive switching behaviors and mechanism of transition metal oxides-based memory devices

Bipolar resistive switching behaviors of Ag/Si/Pt memory device

SG-TFS: A versatile embedded flash with silicon nanocrystals as the storage medium

High-performance hetero-nanocrystal memories

Physical and electrical characteristics of atomic layer deposited RuO nanocrystals for nanoscale nonvolatile memory applications

Gradual Ge/Si heteronanocrystals based non-volatile floating gate memory device with asymmetric tunnel barriers

Enhanced flash memory device characteristics using ALD TiN/Al nanolaminate charge storage layers

Electrical properties of multilayer silicon nano-crystal nonvolatile memory

Enhancing silicon photovoltaics research via integrated circuit wafer engineering defect science experiences and industry/University Consortia

Metal induced continuous grain polycrystalline silicon thin film transistors

Low-temperature processed polycrystalline silicon thin-film transistor with aluminum-replaced source and drain regions

Optimization of charge pumping technique in polysilicon TFTs for geometric effect elimination and trap state density extraction

Fabrication and characteristics of ZnO-based thin film transistors

Monolithic integration of light emitting diodes, photodetector and receiver circuit in standard CMOS technology

Design and fabrication of Bragg reflectors based on SU-8

Readout and signal processing electronics for 2×2 CZT detectors in parallel

Progress in quantum dots for classical and non-classical light sources

Reducing threshold voltage of organic field-effect transistor by using ZrO/PMMA as gate dielectric

Formation of SnO nanoparticles at the AIDCN/ITO interface in organic cross-point memory devices

Temperature dependence of photoluminescence properties of CdS quantum dots prepared on silicon substrate

AZO transparent thin film with E-gun evaporate procedure and application on light emitting diode

Extremely broadband InGaAsP/InP superluminescent diodes

Combined transparent electrodes for high power GaN-based LEDs with long life time

Research on the propagation mechanism and loss of ridged SiGe-OI optical waveguide

Bilayer organic field-effect transistors (OFETs) with better stability

Developing bright and color-saturated quantum dot light emitting diodes towards next generation displays and solid state lighting

High speed cmos imaging: Four years later

Flexible plastic single-crystal si CMOS

Complex-coupled wavelength-selectable dfb laser source for coarse WDM

Improved white organic light-emitting devices with dual-emission-layer design

Broad excitation of Er luminescence in Er-doped HfO films

Effect of the ratio of hole radius to lattice spacing on transmission characteristics for metal/dielectric photonic crystal

Instability for organic field effect transistors caused by dipole on insulator surface

III-N based electronics

Investigations on InAsSb/GaAs high electron mobility transistors with gate passivations

Novel structural Ti/Al-based ohmic contacts on AlGaN/GaN heterostructures

AlGaN/AlN/GaN/InGaN/GaN DH-HEMTs with improved mobility grown by MOCVD

Suppression of intersubband transition by applied electrical fields in AlN/GaN coupled double quantum wells

Magnetotransport properties of the two-dimensional electron gas in AlxGa1-xN/GaN heterostructures under illumination

Temperature dependence of breakdown in anisotropic 6H-SiC MOSFET

Recent progress and material issues of high power and high frequency AlGaN/GaN HFETs

Fluorine plasma ion implantation technology: a new dimension in gan device processing

Present and future prospects of gan-based power electronics

The comprehensive study of liquid phase oxidation on GaAs-based transistor applications

Transport and spin properties of the two-dimensional electron gas in GaN-based heterostructures

Evidence of mobile holes on GaN HFET barrier layer surface - root cause of high power transistoramplifier current collapse

Molecular dynamics simulation study on fluorine plasma ion implantation in AlGaN/GaN heterostructures

Improved performance of 3D tri-gate 4H-SiC MESFETs with recessed drift region

A 45nm low power bulk technology featuring carbon co-implantation and laser anneal on 45°-rotated substrate

65nm poly gate etch challenges and solutions

Polyoxide grown on metal induced re-crystallized polysilicon combined with CF plasma

A study of 65nm BEOL trench etch issues

Single wafer all-wet photo resist strip process for LDD implant in CMOS technology

Process challenges in CMOS FEOL for 32nm node

A study of inverse narrow width effect of 65nm low power CMOS technology

Yield monitor for embedded-sige process optimization

A novel, low-cost deep trench decoupling capacitor for high-performance, low-power bulk CMOS applications

A simple solution of the WSi peeling issue at MDDR technology

A new process for self-aligned silicon-on-insulator with block oxide and its memory application for 1T-DRAM

Yield analysis methods in 65nm technology Development

Investigation on thin gate oxide behavior for CMOS devices

GaAs/Si metal waferbonding for heterogeneous integrated circuits

Ultra-low-temperature process modules for back-wafer-contacted silicon-on-glass RF/microwave technology

New three-dimensional integration technology using reconfigured wafers

Wire sweep improvement in low cost manner

Dynamic scanning method to clarify the mechanism of WLCSP package reliability issue

Microfabrication of Through Silicon Vias (TSV) for 3D SiP

Investigation of low cost consumer electronic system using 1066-Mb/s DDR2 interface design

Thermal accumulation improvement for fabrication manufacturing of monolithic 3D integrated circuits

The study on the thermal behavior of packaged power LEDs

Case study for particle agglomeration during chemical mechanical polishing process

Chip Package Interaction and mechanical reliability impact on Cu/ultra low-k interconnects in Flip Chip package

Investigation and reduction of metal voids post-CMP in dual damascene process

Cu contact on NiSi/Si with a Ru/TaN barrier stack

Comparison of the Ru thin films grown on Si, TiN/Si and TaN/Si substrates by plasma enhanced atomic layer deposition

Mechanism of via etch striation and its impact on contact resistance & breakdown voltage in 65nm cu low-k interconnects

Challenges and solutions of post etch post ash residue removal

Investigation on the metal-clipping issue after FSG deposition

The impact of interface quality on High-K gate dielectric devices for 32 nm technology and beyond

Study on electrical properties of HfTiON and HfTiO gate dielectric Ge MOS capacitors with wet-NO surface pretreatment

Thermal stability of HfON, HfSiON and HfTaON gate dielectrics

Gate-first high-k/metal gate stack for advanced CMOS technology

Interface engineering for high-k/Ge gate stack

Theoretical investigations on metal/high-k interfaces

Integrate LaO-capping layer into metal gated CMOS devices using a gate-first approach for sub-45nm technology node and the device reliability thereof

Alloying effects in Ni Silicide for CMOS applications

A Study of hafnium dioxide (HfO) dielectric charges

Modulate Work Function of Ni-FUSI metal gate by implanting Yb

Electrical characterization of ultrathin single crystalline Gd/Si(100) with Pt top electrode

Production-worthy approach of plasma doping (PD)

Low-k breakdown improvement in 65nm dual-damascene Cu process

TCAD application in process optimization to reduce source/drain junction capacitance of PMOS transistor in the development of 65nm low leakage technology

Influence of surfactant on Si{111} etched surface

Theoretical study of low-energy electron penetration in resist-substrate target by Monte Carlo simulation

A simple nano-scale patterning technology for FinFET fabrication

Ion implantation technology and system for beyond 45nm node devices

Precision ion implantation: A critical tool for advanced device processing

Atomic oxygen effects on NiSi and Ni(Pt)Si: Novel oxidation mechanism

Ni silicidation on heavily doped Si substrates

Atomic level solutions® for advanced microelectronic applications

Atomically controlled CVD processing for future Si-based devices

Ultimate top-down etching processes for future nanoscale devices

Metal ions drift in ultra-low K dielectrics

60GHz high speed wireless link - technology and design challenges

Two 130nm CMOS class-D RF power amplifiers suitable for polar transmitter architectures

A miniaturized high-efficiency GaAs HBT power amplifier used in TD-SCDMA handset application

A 71∼86GHz, 2.5Gbps high performance millimeter-wave direct up-conversion quadrature modulator

A MMIC distributed amplifier with bandwidth of 8–40GHz

A design of multiport waveguide power combiner

Design and performance of a Ku-band 6-bit MMIC phase-shifter

Stable terahertz carrier generation with soliton oscillator

Phase-noise improvement of GaAs pHEMT K-band voltage controlled oscillator using tunable field-plate voltage technology

3.43GHz power amplifier design for satellite communications

A design of C-band improved radial power combiner

Low-power 60GHz CMOS pulse communication

InGaP/GaAs HBT MIC power amplifier with power combining at C-band

Technology and design considerations for millimeter-wave circuits

Crest factor reduction and digital pre-distortion for wireless RF power amplifier optimization

Overview of WiMAX system and related power amplifier design

Gate oxide breakdown location effect on power amplifier and mixed-signal circuits

Millimeter wave integrated oscillator with reduced phase noise and enhanced output power using a novel defected ground structure

An ultra-wideband bandpass filter using EBG structure

Design and realization of a new compact branch-line coupler using defected ground structure

Monolithic III-V/Si integration

Aspect ratio trapping heteroepitaxy for integration of germanium and compound semiconductors on silicon

High-performance III-V MOSFETs enabled by atomic layer deposition

The frequency limits of field-effect transistors: MOSFET vs. HEMT

Liquid phase oxidation of InGaAs and its application to InAlAs/InGaAs MOS-MHEMT without gate recess

Transient leakage current technique for MIS HEMT (Al2O3/AlGaN/GaN) dielectric semiconductor interface property characterization

Enhanced device performance of AlGaN/GaN HEMTs using thermal oxidation of electron-beam deposited aluminum for gate oxide

Three-dimensional impedance engineering for mixed-signal system-on-chip applications

A 3–5 GHz UWB LNA with an active balun in 0.18 μm CMOS process

A 2.4 GHz CMOS ultra low power low noise amplifier design with 65 nm CMOS technology

A 0.18μm CMOS high linearity flat conversion gain down-conversion mixer for UWB receiver

A 6∼9 GHz Bi-quadrature folded-switching down-conversion mixer for MB-OFDM UWB application in 0.18 μm CMOS technology

A low power SiGe HBT LNA utilizing serial inductance for wideband matching

A 1V 6mW inductorless wideband LNA in 0.13μm RF CMOS

A differential low-noise amplifier for ask receiver

A highly linear wideband CMOS LNA adopting current amplification and distortion cancellation

Analysis and design of a dual-band microstrip antenna

A 1.2V low power CMOS front end for bluetooth

Cell-based high-frequency IC design in scaled CMOS

A new current-mode differential low noise amplifier

Experimental study on energy injection damage of a GaAs low noise amplifier with and without DC bias

The RF front-end single-chip SOI solution

A low-power monolithic reconfigurable direct-conversion receiver RF front-end for 802.11a/b/g applications

A wide-band front-end for DVB-H tuner receptions

Development of passive devices in 130 nm RFCMOS technology and PDK implementation for RF VCO designs

A wide-band RF front-end for multi-standard application

A robust CMOS RF front-end design for 3.1–4.8GHz MB-OFDM UWB system

Design optimization of a 10 GHz low noise amplifier with gate drain capacitance consideration in 65 nm CMOS technology

Transmitter: From system architecture to circuit implementation

A compact transceiver for narrow bandwidth and high power Ka-band application

A 1.2V low power CMOS receiver for Bluetooth

Low-power RF wideband polar transmitter design using the Envelope-Tracking technique

A tunable 2.4pJ/b $1^{st}-order$ derivative Gaussian pulse generator for impulse UWB transceivers in 0.13μm CMOS

A single-chip Gaussian monocycle pulse transmitter with on-chip integrated antennas using 0.18 μm CMOS technology

Low power RF transceiver design for Bluetooth applications

Towards self-powered wireless biomedical sensor devices

System design considerations of highly-integrated UHF RFID reader transceiver RF front-end

An RF Transmitter front-end implementation in 0.18μm CMOS for OFDM-UWB

A 900MHz UHF RFID reader transceiver in 0.18μm CMOS technology

23 GHz fully integrated CMOS synthesizer

A 260 MHz $5^{th}-order$ Gm-C Biquad Low-Pass filter with wide frequency tuning range

A novel pipelined CCK decoder for IEEE 802.11b system

A 179-mW 2304-bit flexible LDPC decoder for Wireless-MAN applications

Low complexity channel estimation and tracking method for high speed mobile communication systems

A 1.2V low-power CMOS voltage-controlled oscillator (VCO) using current-reused configuration with balanced resistors for IEEE 802.16e

A 5.6-mW power dissipation CMOS frequency synthesizer for L1/L2 dual-band GPS application

A fully integrated low phase noise VCO for IEEE 802.11a WLAN transceivers in 0.18μm CMOS

Wide band injection-locked quadrature prescaler based on ring oscillators

Filtering technique to lower phase noise for 2.4GHz CMOS VCO

A low-complexity direct digital frequency synthesizer

Process variation tolerant LC-VCO dedicated to ultra-low power biomedical RF circuits

A low power Mobile TV tuner baseband for CMMB application

A $8^{th}-order$ Chebyshev Gm-C lowpass filter for DVB-H tuner

A complex BPF with on chip auto-tuning architecture for low-IF receivers

A low-power CMOS VGA with 60-dB linearly controlled gain range for GPS application

Design of an active polyphase filter in GSM receiver with low-IF topologies

CMOS analog polyphase filters for use in bluetooth systems

Low-power hardware implementation of ECC processor suitable for low-cost RFID tags

Development and application of an isolation feedback generator

Research and application of linearly decomposed decision feedback equalizer for 10 Gb/s optical communications

A low swing differential signaling circuit for on-chip global interconnects

Equalization techniques for high-speed serial interconnect transceivers

A body-biased wide-band VCO

A dual loop dual VCO CMOS PLL using a novel coarse tuning technique for DTV

CMOS cross-coupled VCO architecture comparison at 2GHz and 16GHz

Closed-loop, nonlinearity analysis and design of dual tuning, different control, high FOM two stage ring oscillator

Low phase noise quadrature voltage controlled oscillator for WiMax application

Design of low power multi-standard active-RC filter for WLAN and DVB-H

Nanoscale analog CMOS circuits for medical ultrasound imaging applications

Design of bandgap reference and current reference generator with low supply voltage

A widely tunable continuous-time LPF for a direct conversion DBS Tuner

A new delay line structure for switched capacitor (SC) circuits

A novel optimization methodology based on Genetic Algorithm for gain-boosted OPAMP

IC for neural signal regeneration

A fully integrated CMOS bio-chip aiming at selective assembly of charged nano-particles

Neuro-stimulus chip with photodiodes array for sub-retinal implants

A ±15V interface IC for capacitive accelerometer

A CMOS TDI readout circuit for infrared focal plane array

A low power ROIC design for 1024×1024 IRFPA

A wide-band all-NPN current mirror for precision biasing of multiple circuits

A low-noise low-offset CMOS readout circuit for MEMS capacitive accelerometers

New curvature-coefficient-canceled technique for high-precision CMOS bandgap references

A novel bandgap reference for minimizing current-mirror mismatch

A CMOS band-gap voltage reference with low offset

Versatile voltage-mode multifunction biquadratic filter employing DDCCs

High-input and low-output impedance voltage-mode universal biquadratic filter using FDCCIIs

Research on the Genetic Algorithms applied to evolvement analog IC

A new bandwidth enhancement technique for cascode amplifier

A two-level pipeline input interface circuit with probability splitting computation function used in analog decoder

Statistical design characterization of analog circuits

A high-performance interface for platinum temperature sensors with long-cable

An adaptive front-end for grounded conductivity sensors in liquid-monitoring applications

Design and test results of a front-end ASIC for radiation detectors

Low power design of column readout stage for large format IR ROIC

A programmable time-gain-compensation (TGC) amplifier for medical ultrasonic echo signal processing

Optimal clock overlapping of four-phase Dickson charge pump for power efficiency improvement

Multiband RF-interconnect for CMP inter-core communications

A point to point inter-cluster communication network in clustered superscalar processor

The study of HW/SW co-verification on ARM-prototype system

Design and implementation of a high-performance 64-bit floating-point reciprocal and square root reciprocal unit

A dual-ported variable-way L1 D-cache design for high performance embedded DSP

A new SAR DLL controller

A compact direct digital frequency synthesizer for system-on-chip

A novel DCPLL with small-area and low-power DCO for SoC applications

The implementation of 1-GHz bit-stream adder used in signal processing in a 0.18-μm CMOS technology

A CMOS quaternary-to-binary logic decoder

A new high compression compressor for large multiplier

A unified, scalable dual-field Montgomery multiplier architecture for ECCs

Optimization of explicit-pulsed flip-flops for high performance

Design of digital three-phase SPWM signal generation system based on SoC

Design of watermarking systems for IP protection

A VLSI structural optimization method and workflow based on synthesis frequency inflexion

Integrate custom layout with ASIC back-end design flow for high performance datapath design

Fully automated physical implementation methodology for Tolapai-the first IA based SoC

A multi-core/multi-chip scalable architecture of associative processors employing bell-shaped analog matching cells

Framework of converting C++ class to hardware

Design and performance analysis of one 32-bit dual issue RISC processor for embedded application

Analog/RF design techniques for high performance nanoelectronic on-chip interconnects

Design and analysis of on-chip router

A core-based multi-function security processor with GALS Wrapper

Recent advances in digital-domain background calibration techniques for multistep analog-to-digital converters

Key module design of a battery-less TPMS on chip

A PWM DC-DC boost converter with peak current-mode control for TFT LCD power supply

A low drop-out voltage regulator with multiple enable control

Design of 8-bit 250MHz sample-hold circuit

A novel 1.25GSPS ultra high-speed comparator in 0.18μm CMOS

A cost-efficient 12-Bit 20Msamples/s pipelined ADC

A 2-Bit 4GS/s flash A/D converter in 0.18 μm CMOS for an IR-UWB communication system

Low power Folding/Interpolating ADC with a novel dynamic encoder based on ROM theory

A low kick back noise latched comparator for high speed folding and interpolating ADC

A bootstrapped analog switch for rail-to-rail sampling

High speed CMOS output stage for integrated DC-DC converters

A study of a10-bit 50MS/s low voltage low power pipelined ADC

Influences of realization errors on hybrid filter banks A/D converters

Efficient encoding scheme for folding ADC

Design of ultra-high-speed 10-bit D/A converter

A novel high performance CMOS current switch drive

A poly-resistor 12-bit D/A converter

A fast-locking phase-locked loop using a seven-state phase frequency detector

A low voltage bulk-driving PMOS cascode current mirror

Design of high efficiency buck-boost controller IC

Small-signal transfer functions for a single-switch buck-boost converter in continuous conduction mode

A low power SHA-less pipelined ADC used in DVB-S2

A low-voltage voltage doubler without body effect

A PLL-based current-mode PWM circuit suitable for current-mode controlled techniques

A 65μA 8MHz On-Chip Oscillator with LDO regulator for low-power handheld SoC applications

A high efficiency PWM buck DC/DC converter high-level model and verification

A charge pump circuit design based on a 0.35μm BCD technology for high voltage driver applications

A reconfigurable ΣΔ modulator for multi-standard wireless application

CMOS folding and interpolating ADC with a mixed-averaging distributed T/H circuit

An 8-bit 700Ms/s current-steering DAC

A 10MHz to 600MHz low jitter CMOS PLL for clock multiplication

A novel calibration technique applying to an adaptive-bandwidth PLL

A single-inductor dual-output pseudo-DCM/CCM buck and boost converter in 90nm CMOS technology

Process-design co-optimization for FPGA

Novel mechanical switch devices for reconfigurable IC applications

Design and verification of the programming circuit in an application-specific FPGA

A fully digital DLLs integrated in FPGAs

Application-dependent interconnect testing of Xilinx FPGAs

Performance evaluation of FPGA based crossbar NoC architecture

An FPGA based slave communication controller for Industrial Ethernet

Extending the test paradigm beyond the technology dissemination

A novel linear histogram BIST for ADC

A high precision ramp generator for low cost ADC test

Verification of datapaths based on world level polynomial

On zero clock skew hold time failure in scan test

A novel RF phase error Built-in-Self-Test for GSM

A low power dynamic pseudo random bit generator for test pattern generation

A new configuration scheme for delay test in non-simple LUT FPGA designs

FPGA interconnect testing algorithm based on routing-resource graph

A novel FPGA manufacture-oriented interconnect fault test

A BIST scheme for full characterization of ADC parameters in Mixed-Signal SoCs

Low-voltage limitations and challenges of memory-rich nano-scale CMOS LSIs

A programmable security processor for cryptography algorithms

A novel H.264 QP adaptive MPDC block-matching algorithm and its VLSI design

Design and implementation of two key image processing techniques for CMOS image sensor based on fpga

Study and AISC design of a high efficiency OLED scan controller

Low-power carry look-ahead adder with multi-threshold voltage CMOS technology

Gate-level dual-threshold total power optimization methodology (GDTPOM) principle for designing high-speed low-power SOC applications

A high-speed low-power pulse-swallow divider with robustness consideration

Low power and high performance Zipper domino circuits with charge recycle path

A low power convolver for channel estimation in Chinese DTMB System

Low power circuits for NoC-based SoC design

An atomic-scale nanoelectronic in - vivo sensing system: Fundamental limits

Low power design and implementation for a SoC

Heterogeneous multi-core SOC architecture for MPEG decoding

Memory-efficient architecture including DWT and EC for JPEG2000

A new motion estimation algorithms based on Zero Detection and vector filter in video format conversion chip

Efficient FPGA implementation of modified DWT for JPEG2000

High-speed, pipelined implementation of squashing functions in neural networks

An acquisition circuit in Global Positioning System receivers

Novel frequency synchronization for TDS-OFDM systems

The implementation methods of high speed FIR filter on FPGA

Differential power analysis and differential fault attack resistant AES algorithm and its VLSI implementation

Low power constant multiplier with variable precision computing capability

Research and implementation of high-speed reconfigurable grain algorithm

A reconfigurable power efficient correlator for channel estimation in DTMB system

A novel low-power digital baseband circuit for UHF RFID tag with sensors

A method to lower power in speed negotiation algorithm of fiber channel

Non-volatile register based on hybrid spintronics/CMOS technology

A flexible approach to generating customized elliptic curve cryptographic coprocessors over $GF(2^{m})$

Layout proximity effects and device extraction in circuit designs

Voltage island aware incremental floorplanning algorithm based on MILP formulation

A floorplanning algorithm for block placement in SoC design

The potential of GPUs for VLSI physical design automation

Mask synthesis for 65nm SRAM manufacturing using gradient-based Inverse Lithography Technology (ILT)

Interconnect capacitance characterization based on charge based capacitance measurement (CBCM) technique for DFM applications

BCDRouter: Global routing considering CMP and via reduction

Implement “Mesh+Local Trees” clock design flow in encounter

Efficient frequency-dependent reluctance extraction for large-scale Power/Ground grid

RSMT-MR: A novel RSMT algorithm

Efficient RM conversion algorithm for large multiple output functions

Lithography friendly routing: From construct-by-correction to correct-by-construction

A novel IP quality evaluation method based on IP function

A macromodel solver for power distribution network analysis

Hybrid algorithm for non-slicing floorplans optimization

A survey of RLCK reduction and simulation methods by fast truncated balanced realization

Optimality analysis for power/ground grid automatic generation in early design stage

Autonomous optical proximity correction: The new frontier of design for manufacturing?

X-clock tree construction for antenna avoidance

Optimized copper line aspect ratio by Monte Carlo method

Analysis of RLC interconnect delay considering thermal effect

An improved all-solution SAT solver

Design space exploration for 3D integrated circuits

A symbolic methodology for formal verification of high-level data-flow synthesis

An efficient thermal optimization flow using incremental floorplanning for 3D microprocessors

Cluster-based Placement for multilevel hierarchical FPGA

A synthesis tool for a tile-based heterogeneous FPGA

A high utilization rate routing algorithm for modern FPGA

Fast substrate noise driven floorplanning for mixed-signal circuits considering symmetry constraints

Single-node SOR method for statistical 3D thermal analysis

A novel packing algorithm for sparse crossbar FPGA architectures

Automatic implementation of arithmetic functions in high-level synthesis

UV-LIGA metal MEMS: A promising tool to serve IC industry

Piezoresistive sensor of short- and long- channel MOSFETs on (100) silicon

A novel 2-D wind sensor with thermal feedback

Numerical simulation of silicon micro flat heat pipes with axial triangle grooves

Modeling and simulation of a novel capacitive temperature sensor

Effects of different Si thicknesses on the performance of PECVD SiO double layers electrets

Optimization of macropore silicon morphology etched by photo-electrochemistry

A novel application of anodic bonding for electrical interconnect and its parameter characterization

Electrochemically etched pore array in silicon with large spacing and high-aspect-ratio

Wafer bonding with intermediate Parylene layer

CMOS-MEMS gyroscope using integrated diode-rings as interface circuits

Pillar structured thermal neutron detector

PMOS ring oscillating digital pressure sensor manufactured by MEMS proces

Study on the quadrature error under Varying ambient pressure for a bulk micromachined Z-axis gyroscope

Monolithic integration of bulk micro-machined capacitive accelerometer and signal conditioning circuit

Design of monolithic BiCMOS open-loop detection circuit for MEMS capacitance accelerometer

Nuclear microbatteries for micro and nano Devices

Current MEMS technology and MEMS sensors -focusing on inertial sensors-

Co-integration of silicon nanodevices and NEMS for advanced information processing

New pyroelectric detectors for pyrometry and security technique

Fabrication of novel cantilever with nanotip for AFM applications

In-situ boron-doped low-stress LPCVD polysilicon for micromechanical disk resonator

Smart temperature sensor with quartz tuning fork resonators

The future of MEMS in energy technologies

Al/Au composite membrane bridge DC-contact series RF MEMS switch

Fabrication and test of the planar microcoil for NMR spectroscopy of samples in nL level

Surface micromachined cantilever arrays for infrared imaging

Development of a CMOS-compatible electrostatically actuated diaphragm chamber for micropump application

A novel EWOD digital microfluidic device using P(VDF-TrFE)

Design and test of high load piezoelectricity actuator

A reconfigurable RF MEMS low-pass filter, based on CPW periodic structures

A 10–14 GHz RF MEMS tunable bandpass filter

Microwave frequency detector based on MEMS technology

A fixed-fixed beam MEMS microwave power sensor fabricated on GaAs substrate

Contact printing of metallic pattern and its applications on fabricating high-frequency surface acoustic wave (SAW) devices

Tunable band-pass filters using Mems switches

Simulation and fabrication of the SiC-based clamped-clamped filter

Integrated CMOS-MEMS technology and its applications

Characterization of capacitor charging by vibration-based piezoelectric power generator

Reflective display device based on electrowetting

Detection of stiction of suspending structures in MEMS by A Laser Doppler Vibrometer systems

Development of novel SU-8 based nanoimprint lithography

A bulk micromachined tunable dual-mode ku-band bandpass filter

3-D microinductor fabricated by using MEMS technology

Fabrication and transmission characteristic of PDMS plasma photonic crystal

DNA sensing - an overview of present technology and future trends

Design of a DNA probe using barium strontium titanate

Characterizations of single gate and multi-finger gate of ISFET for pH sensor applications

Polysilicon wire sensor for biochemical detection with the help of capillary atomic-force-microscopy tip for solution transfer

Electronic design for an implantable wireless power and data transmission system

Absorption and desorption characteristic of zeolites in gas sensor system

Fabrication of nanostructured titania thin film at low temperature

Wireless implantable EMG sensor for powered prosthesis control

A CMOS active-pixel sensor based DNA micro-array with nano-metallic particles detection protocol

Large-range large-aperture MEMS micromirrors for biomedical imaging applications

Merging SoC and LOC together

Research of CMOS biosensor IC for extracellular electrophysiological signal recording and pH value measuring

A surface plasmon resonance(SPR)sensor chip integrating prism array based on polymer microfabrication

Photonic crystal biosensors based on surface plasmons

Fabrication and transmission characteristic of PDMS plasma photonic crystal

Future memory technologies

IC innovations in automotive

Application oriented MEMS by open collaboration

Using innovation to drive Moore’s Law

Green transistor as a solution to the IC power crisis

Conference organizations

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings

Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004.

2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443)

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

Proceedings of 4th International Conference on Solid-State and IC Technology

Nonvolatile SRAM cell based on CuO

Content Provider	IEEE Xplore Digital Library
Author	Xiaoyong Xue Gang Jin Ji Zhang Le Xu Yiqing Ding Yufeng Xie Changhong Zhao Chen, B.A. Yinyin Lin
Copyright Year	2008
Description	Author affiliation: ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China (Xiaoyong Xue; Gang Jin; Ji Zhang; Le Xu; Yiqing Ding; Yufeng Xie; Changhong Zhao; Chen, B.A.; Yinyin Lin)
Abstract	A nonvolatile static random access memory (NVSRAM) cell with two back-up $Cu_{x}O$ memory devices is proposed in this paper. The manufacturing process is compatible with the standard CMOS process. By adopting a dynamic supply voltage scheme, the proposed cell can work correctly in four different operation modes. Compared with the standard SRAM cell, the proposed cell offers non-volatile storage which allows the unused blocks of SRAM to be powered down to save energy.
Starting Page	869
Ending Page	871
File Size	2064942
Page Count	3
File Format	PDF
ISBN	9781424421855
DOI	10.1109/ICSICT.2008.4734681
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-20
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Voltage Nonvolatile memory Leakage current Logic devices CMOS process CMOS technology Manufacturing processes Energy consumption Phase change materials
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in