NDLI: Factors for negative bias temperature instability improvement in deep sub-micron CMOS technology

Content Provider	IEEE Xplore Digital Library
Author	Liao, C.C. Gan, Z.H. Wu, Y.J. Zheng, K. Guo, R. Ju, J.H. Jay Ning He, A. Ye, S. Eric Liu Waisum Wong
Copyright Year	2008
Description	Author affiliation: Logic Technol. Dev., Semicond. Manuf. Int. Corp., Shanghai, China (Liao, C.C.; Gan, Z.H.; Wu, Y.J.; Zheng, K.; Guo, R.; Ju, J.H.; Jay Ning; He, A.; Ye, S.; Eric Liu; Waisum Wong)
Abstract	Negative bias temperature instability (NBTI) in PMOS has emerged as one of the critical reliability concerns in deep sub-micron devices. A comprehensive study has performed to improve the device NBTI performance by process optimization. It is found that the most effective ways to reduce the NBTI degradation are to control the nitrogen concentration and profile in the nitrided gate oxide, to implement LDD and source/drain implantation by BF2 instead of by B, and to employ a lower annealing temperature and a more diluted H2/N2 mixture. It is seen that the nitrogen incorporation mainly results in more oxide traps. By optimizing the decoupled plasma nitridation (DPN) process, the nitrogen peak/profile should be controlled away from the oxide/Si interface, thus reducing the oxide trap and improving NBTI performance. Incorporation of fluorine species during source/drain implantation can reduce both interface traps and oxide traps.
Starting Page	612
Ending Page	615
File Size	1727291
Page Count	4
File Format	PDF
ISBN	9781424421855
DOI	10.1109/ICSICT.2008.4734619
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-10-20
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	CMOS technology Negative bias temperature instability Niobium compounds Titanium compounds Nitrogen Plasma temperature Degradation Temperature control Annealing Hydrogen
Content Type	Text
Resource Type	Article

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