NDLI: A special purpose embedded system for neural machine interface for artificial legs

Content Provider	IEEE Xplore Digital Library
Author	Xiaorong Zhang He Huang Qing Yang
Copyright Year	2011
Description	Author affiliation: Department of Electrical, Computer, and Biomedical Engineering, University of Rhode Island, Kingston, RI 02881, USA (Xiaorong Zhang; He Huang; Qing Yang)
Abstract	This paper presents a design and implementation of a neural-machine interface (NMI) for artificial legs that can decode amputee's intended movement in real time. The newly designed NMI integrates an FPGA chip for fast processing and a microcontroller unit (MCU) with multiple on-chip analog-to-digital converters (ADCs) for real-time data sampling. The resulting embedded system is able to sample in real time 12 EMG signals and 6 mechanical signals and execute a special complex phase-dependent classifier for accurate recognition of the user's intended locomotion modes. The implementation and evaluation are based on Altera's Stratix III 3S150 FPGA device coupled with Freescale's MPC5566 MCU. The experimental results for classifying three locomotion modes (level-ground walking, stairs ascent, and stairs descent) based on data collected from an able-bodied human subject have shown acceptable performance for real-time controlling of artificial legs.
Starting Page	5207
Ending Page	5210
File Size	1100444
Page Count	4
File Format	PDF
ISBN	9781424441211
ISSN	1557170X
e-ISBN	9781457715891
e-ISBN	9781424441228
DOI	10.1109/IEMBS.2011.6091288
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-08-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Electromyography Legged locomotion Real time systems Algorithm design and analysis Software Feature extraction
Content Type	Text
Resource Type	Article
Subject	Signal Processing Biomedical Engineering Health Informatics Computer Vision and Pattern Recognition

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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