NDLI: A 24GHz low power and low phase noise PLL frequency synthesizer with constant KVCO for 60GHz wireless applications

Content Provider	IEEE Xplore Digital Library
Author	Jun Luo Lei Zhang Li Zhang Yan Wang Zhiping Yu
Copyright Year	2015
Description	Author affiliation: Inst. of Microelectron., Tsinghua Univ., Beijing, China (Jun Luo; Lei Zhang; Li Zhang; Yan Wang; Zhiping Yu)
Abstract	In this paper, a fully integrated 24GHz integer-N PLL for a 60GHz wireless transceiver is presented. A VCO with tail-feedback technique is used to improve the phase noise by modulating the tail current, and a switched varactor array is also adopted together with a switched capacitor array to compensate the variation of $K_{VCO}$ over different bands. Moreover, benefiting from the careful optimization of CML pre-scaling divider, the PLL operates correctly when VCO buffer is turned off, coming up with an extremely low power. The whole PLL is fabricated in standard 90-nm process. Measurement shows that the VCO achieves a phase noise of -102dBc/Hz@1MHz offset with a tuning range of over 16%. The $K_{VCO}$ variation over all bands is less than 16%. In close-loop operation mode the PLL shows an integrated phase error of 3.3°rms (from 100kHz to 100MHz) over prescribed frequency bands, and a total power dissipation of only 26mW.
File Size	697604
Starting Page	2840
Ending Page	2543
File Format	PDF
ISBN	9781479983919
DOI	10.1109/ISCAS.2015.7169278
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-05-24
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase locked loops Voltage-controlled oscillators Phase noise Switches Tuning Arrays Frequency conversion 24GHz PLL VCO low power phase noise
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in