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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yajuan He Ziji Zhang Bin Ma Jinpeng Li Shaowei Zhen Ping Luo Qiang Li |
| Copyright Year | 2015 |
| Description | Author affiliation: Univ. of Electron. Sci. & Technol. of China, Chengdu, China (Yajuan He; Ziji Zhang; Bin Ma; Jinpeng Li; Shaowei Zhen; Ping Luo; Qiang Li) |
| Abstract | The canonical signed digit (CSD) coding is widely used in digital arithmetic operations due to its property that there is no adjacent nonzero digits in the encoded numbers. However, the benefits of the CSD coding may be faded because of the recursive conversion process from the binary representations. This paper presents a novel pseudo CSD coding method, which takes the merits of CSD, while simplifies the conventional conversion process. The simulation results indicate that the proposed converter can achieve at least 31.8% speed improvement and 42.9% energy reduction for a 16-bit binary operand at 1.2V in a 0.13-μm CMOS technology. It could run even faster than the competitors when the operand length increases. |
| Starting Page | 838 |
| Ending Page | 841 |
| File Size | 487323 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479983919 |
| DOI | 10.1109/ISCAS.2015.7168764 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-05-24 |
| Publisher Place | Portugal |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Encoding Delays Simulation Energy consumption Energy efficiency Circuit synthesis Complexity theory pseudo CSD coding multiplication fast MSD |
| Content Type | Text |
| Resource Type | Article |
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