NDLI: A low cost jitter estimation and ADC spectral testing method

Content Provider	IEEE Xplore Digital Library
Author	Li Xu Degang Chen
Copyright Year	2015
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA (Li Xu; Degang Chen)
Abstract	Clock jitter is a crucial factor in high speed and high performance Analog-to-Digital Converter (ADC) testing. Random clock jitter increases the noise floor in the ADC output spectrum making it difficult to obtain the true ADC Signal to Noise Ratio (SNR). Periodic Jitter generates spurs in the ADC output spectrum. Another well-known challenge is to achieve precise coherent sampling. This paper proposes an efficient and accurate ADC spectral testing method that completely eliminates the need for coherent sampling and very effectively separate clock jitter from ADC noise, thus allowing the true ADC spectral parameters to be accurately tested with an imprecise sampling clock. Simulation results of ADCs with different resolutions demonstrate the functionality and accuracy of the method.
Starting Page	2277
Ending Page	2280
File Size	477547
Page Count	4
File Format	PDF
ISBN	9781479983919
DOI	10.1109/ISCAS.2015.7169137
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-05-24
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Jitter Testing Clocks Signal to noise ratio Mathematical model Estimation non-coherency Analog-to-Digital Converter spectral testing random jitter periodic jitter noise
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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