NDLI: Warpage improvement for large die flip chip package

Content Provider	IEEE Xplore Digital Library
Author	Bingshou Xiong Lee, M.-J. Kao, T.
Copyright Year	2009
Description	Author affiliation: Xilinx, Asia Pacific Pte. Ltd., Singapore, Singapore (Bingshou Xiong) \|\| Xilinx Taiwan, Taiwan (Kao, T.) \|\| Xilinx, Inc., San Jose, CA, USA (Lee, M.-J.)
Abstract	In the case of field programmable gate array (FPGA) chips, as the demand for higher speeds and enhanced functionality increases, the size of the flip chip die grows accordingly to offer higher number of logic cells. Large flip chip die also requires a large package for efficient signal routing. This paper shows a warpage improvement study including lid design and process optimization to solve warpage issue of large die FPGA flip chip packages with more fragile bump (23 * 23 mm die and 42.5 * 42.5 mm package). Though package warpage is well controlled for standard eutectic bump BOM (bill of materials) and process, it encountered problem when using higher Tg underfill, which is for better bump protection and reliability. A detailed finite element analysis was performed to simulate the effect of different lid structures (foot width, thickness etc) and lid materials (Cu, Al etc) on warpage. Actual units were built using improved lid structures and process. It was found that thicker Cu lid and lower underfill cure temperature are effective ways for warpage control, less than 8 mils warpage was achieved by lid design and process optimization for this 42.5 mm package with 23 mm die with more fragile bump.
Starting Page	40
Ending Page	43
File Size	569279
Page Count	4
File Format	PDF
ISBN	9781424450992
e-ISBN	9781424451005
DOI	10.1109/EPTC.2009.5416574
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Packaging Field programmable gate arrays Programmable logic arrays Process design Design optimization Bills of materials Routing Protection Materials reliability
Content Type	Text
Resource Type	Article

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