NDLI: Challenges for extra large embedded wafer level ball grid array development

Content Provider	IEEE Xplore Digital Library
Author	Jing-en Luan Yonggang Jin Kim-yong Goh Yiyi Ma Guojun Hu Yaohuang Huang Baraton, X.
Copyright Year	2009
Description	Author affiliation: Corporate Packaging, Engineering & Automation, STMicroelectronics, 629 Lorong 4/6 Toa Payoh, Singapore 319521, Andreas Wolter, Infineon AG, Kang Chen, STATS Chippac (Jing-en Luan; Yonggang Jin; Kim-yong Goh; Yiyi Ma; Guojun Hu; Yaohuang Huang; Baraton, X.)
Abstract	Fan-out embedded wafer level ball grid array (eWLB) is a very promising packaging technology with many advantages in comparison to standard Ball Grid Array Packages and leadframe based packages because of smaller size, better electrical and thermal performance, higher package interconnect density and system integration possibilities at low packaging cost. It was successfully developed for medium and large-size package. However, there is strong need to develop extra large eWLB for system integration. Compared with large eWLB, there are many challenges for extra large eWLB development. Wafer or panel level warpage, package level reliability, and board level reliability are ones of the most challenging issues. In this paper, finite element modeling was used to create design rules and optimize test vehicles based on the correlation done for medium, large-size eWLB. Two test vehicles were indentified for process development and reliability test. Recent progress in the extra large eWLB development is introduced in this paper, the results show that the design rule and process capability are reliable and ready for extra large molded embedded wafer level package for system integration needs.
Starting Page	202
Ending Page	207
File Size	2365359
Page Count	6
File Format	PDF
ISBN	9781424450992
e-ISBN	9781424451005
DOI	10.1109/EPTC.2009.5416551
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electronics packaging Wafer scale integration Testing Vehicles Process design Space technology Costs Semiconductor device modeling Bridges Dielectric thin films
Content Type	Text
Resource Type	Article

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