NDLI: Laser grooving characterization for dicing defects reduction and its challenges

Content Provider	IEEE Xplore Digital Library
Author	Koh Wen Shi Lau Teck Beng Yow, K.Y.
Copyright Year	2009
Description	Author affiliation: Freescale Semiconductor Malaysia Sdn. Bhd., 2, Jln. SS8/2, Free Industrial Zone Sungei Way, 47300 P.J. Selangor, Malaysia (Koh Wen Shi; Lau Teck Beng; Yow, K.Y.)
Abstract	Blade sawing has been widely used in semiconductor industry and it is the most conventional process in semiconductor manufacturing to produce singulated ICs. This well established dicing technique poses challenges to process next generation of wafer when the wafer fabrication technology is fast scaling down in node size to 90-, 45-, 32-and 22-nm where low-k dielectric is used. ILD (Inter-Layer Dielectric) and metal layers peelings, cracks, chipping, and delamination are the most common dicing defects observed on low-k wafer processed by the traditional blade sawing techniques. This paper presents an experimental study to improve the dicing performance and quality on processing low-k wafer by using a combination of laser grooving process and traditional blade sawing technique. Some low-k wafers were used as test vehicles. The laser process outcomes and responses are governed by the changes of process input parameters such as laser power, repetition rate, grooving feed speed, defocus amount and street index. The effects of the process parameters on the laser kerf geometry, grooving edge quality and defects are evaluated by using optical microscopy and scanning electron microscopy (SEM). Experimental results have shown that the dicing quality produced by using a combination of laser grooving and blade sawing technique can significantly minimize the dicing defects. It is one of the potential solutions to address the quality and yield issues in low-k wafer dicing. The key challenges of laser grooving and recommended future development works are discussed.
Starting Page	846
Ending Page	850
File Size	2889658
Page Count	5
File Format	PDF
ISBN	9781424450992
e-ISBN	9781424451005
DOI	10.1109/EPTC.2009.5416427
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Blades Sawing Optical microscopy Scanning electron microscopy Dielectrics Laser transitions Power lasers Semiconductor lasers Electronics industry Manufacturing processes
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Laser Dicing and Subsequent Die Strength Enhancement Technologies for Ultra-thin Wafer

Advanced dicing technology for semiconductor wafer -Stealth Dicing

Alternative double pass dicing method for thin wafer laminated with die attach film

Ultra short pulse laser meeting the requirements for high speed and high quality dicing of low-k wafers

Process challenges in low-k wafer dicing

Evaluation for UV laser dicing process and its reliability for various designs of stack chip scale package

Laser grooving on narrow scribe widths on thick flip chip wafer: The challenges and its resolution

Multi beam laser grooving process parameter development and die strength characterization for 40nm node low-K/ULK wafer

Single & multi beam laser grooving process parameter development and die strength characterization for 40nm node low-K/ULK wafer

Laser grooving characterization for dicing defects reduction and its challenges

Similar Documents

Laser Dicing and Subsequent Die Strength Enhancement Technologies for Ultra-thin Wafer

Advanced dicing technology for semiconductor wafer -Stealth Dicing

Alternative double pass dicing method for thin wafer laminated with die attach film

Ultra short pulse laser meeting the requirements for high speed and high quality dicing of low-k wafers

Process challenges in low-k wafer dicing

Evaluation for UV laser dicing process and its reliability for various designs of stack chip scale package

Laser grooving on narrow scribe widths on thick flip chip wafer: The challenges and its resolution

Multi beam laser grooving process parameter development and die strength characterization for 40nm node low-K/ULK wafer

Single & multi beam laser grooving process parameter development and die strength characterization for 40nm node low-K/ULK wafer

Laser grooving characterization for dicing defects reduction and its challenges