NDLI: Reliability consequences of the chip-package interactions

Content Provider	IEEE Xplore Digital Library
Author	van Driel, W.D.
Copyright Year	2009
Description	Author affiliation: NXP Semiconductors, Gerstweg 2, 6534 AE Nijmegen, The Netherlands (van Driel, W.D.)
Abstract	In general an IC needs to be assembled before being put on a microelectronics board by the end customer. The materials of which the IC is made and the materials for the assembly normally have different thermo-mechanical behavior. Temperature changes during manufacturing, testing and application will therefore cause stresses in the materials. These stresses, in extreme cases, may cause serious damages to the ICs, especially at the corners of the chip. Besides efforts of process improvements and material optimization for both packaging and IC manufacturing, proper measures need to be taken in IC design in order to eliminate/suppress the problem sufficiently. Towards this end, Virtual Prototyping is performed to estimate the stresses within the backend stack of the chip. With the help of these simulations, the most sensitive locations within the structure are identified; these may lead to design rules. This paper described two industrial case studies in which chip-package interactions are found to be crucial for the reliability of the product.
Starting Page	406
Ending Page	411
File Size	789979
Page Count	6
File Format	PDF
ISBN	9781424450992
e-ISBN	9781424451005
DOI	10.1109/EPTC.2009.5416512
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Assembly Thermal stresses Microelectronics Thermomechanical processes Temperature Materials testing Design optimization Integrated circuit packaging Manufacturing processes Semiconductor device measurement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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