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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Yoshida, A. Shengmin Wen Wei Lin JaeYun Kim Ishibashi, K. |
| Copyright Year | 2011 |
| Description | Author affiliation: Nokia Japan Co., Ltd. ARCO TOWER 4F, 1-8-1, Shimomeguro, Meguro-ku, Tokyo 153-0064, Japan (Ishibashi, K.) || Amkor Technology Korea Inc. 280-8, 2-ga, Sungsu-dong, Sundong-gu, Seoul 133-706, Korea (JaeYun Kim) || Amkor Technology Inc. 1900 South Price Road, Chandler, AZ 85286, U.S.A (Yoshida, A.; Shengmin Wen; Wei Lin) |
| Abstract | This paper presents a study on an Ultra Thin PoP, Package on Package, using Through-Mold-Via Technology (TMV). The total height of the evaluated PoP is approximately 1.0 mm including both top and bottom packages. In recent years, package-on-package (PoP) has been rapidly adopted for 3D integration of logic and memory within mobile handsets and other portable multimedia devices. However, existing methods of making the PoP may not satisfy next generation applications that will require reduced memory interface pitches, higher memory interface pin-counts and reduced thickness. In this study, an existing 0.5mm pitch top package was utilized as a control. An Ultra Thin bottom PoP had to be developed to meet the 1.0mm stack height target which needs advanced thin material and process technologies. The stack height of 1.0mm requires higher warpage control challenge for the bottom package to support different die size applications. This Ultra Thin bottom PoP test vehicle was built in 12mm × 12mm body, 0.5mm top / bottom pitch, 0.15mm thick mold, and die sizes ranging from 5.0mmsq. to 8.7mmsq. This package was tested with 4-layer / 0.23mm thick and 2-layer / 0.17mm thick substrate. The total PoP height is expected to be approximately 1.0mm by SMT one pass reflow stacking of the top memory package on the bottom Ultra Thin logic package. The package warpage was compared for two package configurations. One is bare die structure with assumption of flip chip interconnect. The other is TMV, where the entire package is over molded, and through-mold vias are laser-drilled down to TMV pads for interface with a top memory package. Confirmation has been made that the TMV structure is capable of accommodating larger die compared to bare die structure. This is because CTE in the package can be controlled by both of the substrate and Epoxy Molding Compound (EMC). In addition, the TMV structure has a flatter and more stable warpage profile due to the over molded EMC structure and material properties selected. From the measurement result, warpage amount and direction greatly depend on substrate construction and die size. Based on warpage result, two test vehicle conditions were selected with TMV configuration to carry out Board Level Reliability (BLR) testing. The test vehicle was mounted on board with a typical package stacking process. After on-board reflow process, (i.e. top and bottom PoP packages were reflowed at one time), the yield for package stacking showed good results demonstrated even with the limited set up for this trial. The test vehicle passed Drop Test and TCT (Temperature Cycling Test) criteria. |
| Starting Page | 1547 |
| Ending Page | 1551 |
| File Size | 853982 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781612844978 |
| ISSN | 05695503 |
| e-ISBN | 9781612844985 |
| e-ISBN | 9781612844961 |
| DOI | 10.1109/ECTC.2011.5898716 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-05-31 |
| Publisher Place | Florida, USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Substrates Electromagnetic compatibility Leg Stacking Vehicles Reliability |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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