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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kwang-Seong Choi Ki-Jun Sung Hyun-Cheol Bae Jong-Tae Moon Yong-Sung Eom |
| Copyright Year | 2011 |
| Description | Author affiliation: Convergence Components and Materials Research Laboratory ETRI, 138 Gajeongno Yuseong-gu Daejeon, 305-700, Korea (Kwang-Seong Choi; Ki-Jun Sung; Hyun-Cheol Bae; Jong-Tae Moon; Yong-Sung Eom) |
| Abstract | A novel, maskless, low-volume bumping material, called solder bump maker, which is composed of a resin and low-melting-point solder powder, has been developed to make solder bumps on TSVs. With the coining process, the standard deviation of bump heights became 1μm. Fluxing underfill which features an extremely low-weight loss with temperature, has been, also, developed to simplify the chip-to-chip and chip-to-wafer bonding processes and implement the mass reflow process for them. Therefore, these processes can be reduced to only three steps: dispensing fluxing underfill, pick and place of TSV chips, and reflow. With the fluxing underfill, a 4 × 4 array of 4 tier-stacked TSV chips on a Si wafer was, successfully, developed. |
| Starting Page | 1746 |
| Ending Page | 1751 |
| File Size | 2496865 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781612844978 |
| ISSN | 05695503 |
| e-ISBN | 9781612844985 |
| e-ISBN | 9781612844961 |
| DOI | 10.1109/ECTC.2011.5898748 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-05-31 |
| Publisher Place | Florida, USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Through-silicon vias Substrates Bonding Silicon Powders Arrays Resins |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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