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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hyoung Joon Kim Ser Choong Chong Ho, D.S.W. Yong, E.W.Y. Chee Houe Khong Teo, C.W.L. Fernandez, D.M. Guan Kian Lau Vasarla, N.S. Lee, V.W.S. Vempati, S.R. Navas, K.O.K. |
| Copyright Year | 2011 |
| Description | Author affiliation: Institute of Microelectronics, A∗STAR (Agency for Science, Technology and Research) 11 Science Park Road, Singapore Science Park II, Singapore 117685 (Hyoung Joon Kim; Ser Choong Chong; Ho, D.S.W.; Yong, E.W.Y.; Chee Houe Khong; Teo, C.W.L.; Fernandez, D.M.; Guan Kian Lau; Vasarla, N.S.; Lee, V.W.S.; Vempati, S.R.; Navas, K.O.K.) |
| Abstract | In this paper, we focus how to overcome process challenges, such as die shift and warpage, and to fabricate thin embedded wafer level packages (EMWLPs) with 200μm-thick eventually. The initial warpage of reconfigured wafer after post mold curing (PMC) was about 1.0 ∼ 1.4mm range. After PMC, the molded wafer was background to 200μm thickness and redistribution layer (RDL) process was conducted on both front- and back-sides of the molded wafer sequentially. However, the warpage increased up to several mm during $1^{st}$ RDL formation so that multi-RDLs process could not be performed due to the largely warped wafer. In order to overcome the large warpage issue, thick Si wafer was adopted as a carrier and the molded wafer was bonded on the Si carrier before RDL process. The measured warpage values decreased from several mm to about 500μm during RDL process by using the Si carrier and two RDLs were fabricated on both sides of the molded wafer. Consequently, the fabrication of 200μm-thick molded wafer for EMWLPs was successfully achieved. Three reliability tests (MSL3, HAST, and TC) were performed with singulated EMWLP modules and no failure was observed in the results of component level reliability. Furthermore, for in-depth understanding of the effects of MCs and carrier types on the die shift of the reconfigured wafer, the die shift values were measured on the molded wafers made of different MCs and different carriers as well. The experimental results are being compared with computational simulation and this can provide basic guidance of material selection and molding process. |
| Starting Page | 78 |
| Ending Page | 83 |
| File Size | 1812114 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781612844978 |
| ISSN | 05695503 |
| e-ISBN | 9781612844985 |
| e-ISBN | 9781612844961 |
| DOI | 10.1109/ECTC.2011.5898495 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-05-31 |
| Publisher Place | Florida, USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Silicon Copper Compounds Semiconductor device reliability Fabrication |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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