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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wei Lin Na, J.H. |
| Copyright Year | 2010 |
| Description | Author affiliation: Amkor Technology 1900 S Price Rd, Chandler, AZ 85286 (Wei Lin; Na, J.H.) |
| Abstract | Strip level warpage is important for improving package manufacturing processes yield. In addition, the process induced warpage in strip level can be one of the major contributors to package level warpage variation at end of line after singulation. However, not many studies have been conducted so far in the area of strip level warpage measurement and simulation due to some limitations. In this paper, shadow moiré method was investigated to measure the warpage of the entire strip at elevated temperatures. Technical issues related to measuring samples with size as large as a strip in shadow moiré, such as temperature uniformity, were fully evaluated. A super element sub-structuring simulation methodology was proposed and investigated to model strip level warpage in order to capture all the package details and substrate signal layer trace structures while keeping the whole strip model at a reasonable size for solution efficiency. Through this measurement and simulation study, it was found that (1) a strip could show warpage dominated in strip length direction or in width direction. More importantly, this dominant direction could switch when temperature ramped up from room temperature to reflow temperature. (2) Different window blocks in the same strip could have different warpage characteristics. The inner window blocks had warpage dominated in width direction at all temperatures, but the outer window blocks changed the dominant warpage direction from length to width direction as temperature increased. As a result, it was concluded that a whole strip must be measured or simulated rather than just one window block for strip level warpage characterization. (3) Unlike package level warpage model, nonlinear geometry effect was very significant for strip level model. This effect must be taken into account in the model in order to obtain accurate simulation results. (4) For the strip studied here, simulation results showed lower copper density in the substrate helped reduce strip warpage. In addition, the effect of copper balance among 4 signal layers was also evaluated. |
| Starting Page | 84 |
| Ending Page | 90 |
| File Size | 765936 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781424464104 |
| ISSN | 05695503 |
| e-ISBN | 9781424464128 |
| e-ISBN | 9781424464111 |
| DOI | 10.1109/ECTC.2010.5490886 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-06-01 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Strips Packaging Assembly Temperature Solid modeling Switches Copper Manufacturing processes Area measurement Size measurement |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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