NDLI: Extraction of a lumped element, equivalent circuit model for via interconnections in 3-D packages using a single via structure with embedded capacitors

Content Provider	IEEE Xplore Digital Library
Author	Poh, C.H.J. Bhattacharya, S.K. Ferguson, J. Cressler, J.D. Papapolymerou, J.
Copyright Year	2010
Description	Author affiliation: NSWC Crane, Crane, IN 47522, USA (Ferguson, J.) \|\| School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332-0250, USA (Poh, C.H.J.; Bhattacharya, S.K.; Cressler, J.D.; Papapolymerou, J.)
Abstract	A methodology for extracting an accurate, lumped element, equivalent circuit model for an interlayer via in a 3-D packaging scheme is presented. The model of a single via is extracted based upon the EM simulation of a test structure in which the via is landed at an internal capacitance layer within the multi-layer Liquid Crystal Polymer (LCP) or Printed Circuit Board (PCB) substrate. The objectives for the single via modeling is to: (i) realize a simplified model that can be used for circuit simulation; (ii) to drastically reduce computation time and; (iii) most importantly, to predict the electrical behavior of the embedded capacitor layer on which the via is terminated. It can be seen from the simulation results that the parasitic inductance and resistance of the via increase with increasing via height. Model as well as EM simulations for via interconnections on the LCP substrate with different via heights (2 mil to 10 mil) have been performed and the model results show good agreement with the EM simulations. For experimental validation, a test structure consisting of a 3 mil thick PCB dielectric on top of a buried 16 micron thick capacitance layer was designed and fabricated. A via diameter of 6 mil was simulated for various internal capacitances of 1, 7, 14, 72, and 142 pF. The model showed good matching with the measured data in the range of 500 MHz to 12 GHz. Therefore, it is evident that simple and precise via modeling can accurately pre-determine the electrical performance of the PCB compatible embedded capacitors which would add immense value to application-driven PCB manufacturing.
Starting Page	1783
Ending Page	1788
File Size	819968
Page Count	6
File Format	PDF
ISBN	9781424464104
ISSN	05695503
e-ISBN	9781424464128
e-ISBN	9781424464111
DOI	10.1109/ECTC.2010.5490726
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-06-01
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Equivalent circuits Integrated circuit interconnections Packaging Capacitors Circuit simulation Capacitance Circuit testing Predictive models Computational modeling Dielectric substrates
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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