NDLI: Self-aligned ALD AlO T-gate footprint insulator for gate leakage current suppression in SiN passivated AlGaN/GaN HEMTs

Content Provider	IEEE Xplore Digital Library
Author	Meyer, D.J. Bass, R. Katzer, D.S. Deen, D.A. Binari, S.C. Daniels, K.M. Eddy, C.R.
Copyright Year	2009
Description	Author affiliation: Naval Research Laboratory, Electronics Science and Technology Division, U.S.A (Meyer, D.J.; Bass, R.; Katzer, D.S.; Deen, D.A.; Binari, S.C.; Daniels, K.M.; Eddy, C.R.)
Abstract	GaN based transistors have recently demonstrated record high RF output power density at 4 and 8 GHz through refinements in materials growth and improved device design involving field plates [1]. However, to push GaN HEMT performance into the mm-wavelength frequency range (30–300 GHz) will require the use of other innovative solutions that maintain high device breakdown voltages while avoiding the incurrence of additional parasitic capacitance. High-κ dielectric gate insulators can reduce gate leakage current and improve breakdown voltage [2], but often require a blanket deposition that may degrade frequency performance due to fringing capacitance or trapping/charging effects in the gate-source and gate-drain access regions [3]. Removing the high-K dielectric in the access regions with plasma etching can present challenges in reproducibility or induce crystalline damage/surface modification that can degrade 2DEG channel properties. The devices in this study demonstrate a novel process methodology that allows for a self-aligned ALD AlO gate insulator to be placed directly under the T-gate footprint and not in the access regions. After gate contact formation, standard PECVD SiN passivation can be applied just as in a conventional HEMT process. Preliminary devices show promising results that this technique can be used to achieve high power mm-wave performance.
Starting Page	1
Ending Page	2
File Size	123858
Page Count	2
File Format	PDF
ISBN	9781424460304
DOI	10.1109/ISDRS.2009.5378279
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	HEMTs MODFETs Gallium nitride Passivation Insulation Radio frequency Leakage current Dielectrics Plasma applications Plasma devices
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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