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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Tung-Ming Pan Chih-Jen Chang Ching-Lin Chan Sheng-Han Su Wu-Ching Lin |
| Copyright Year | 2009 |
| Description | Author affiliation: Department of Electronics Engineering, Chang Gung University, Taoyuan 333, Taiwan, R. O. C. (Tung-Ming Pan; Chih-Jen Chang; Ching-Lin Chan; Sheng-Han Su; Wu-Ching Lin) |
| Abstract | Low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) are being investigated for peripheral driver circuits of system-on-panel because of their low threshold voltage and high carrier mobility [1]. However, the trap states in the poly-Si grains and grain boundaries degrade the carrier's transport and increase the off-stated leakage current [2]. A fluorination process has been utilized to reduce the trap states of poly-Si film [3]. Recently, it has been reported that HfO, Pr, and LaAlO gate dielectric [4–6] in LTPS TFTs exhibit excellent device performance due to their thin equivalent oxide thickness (EOT). Moreover, Jeon and Hwang reported that an amorphous PrTi film exhibited a thinner interfacial layer, a higher capacitance value, a lower leakage current, and a lower reactivity to water [7]. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 282467 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781424460304 |
| DOI | 10.1109/ISDRS.2009.5378022 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-12-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Thin film transistors Plasma devices High K dielectric materials High-K gate dielectrics Plasma temperature Plasma properties Plasma density Plasma displays Stress Threshold voltage |
| Content Type | Text |
| Resource Type | Article |
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