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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jiezhi Chen Saraya, T. Hiramoto, T. |
| Copyright Year | 2009 |
| Description | Author affiliation: Institute of Industrial Science, University of Tokyo (Jiezhi Chen; Saraya, T.; Hiramoto, T.) |
| Abstract | Nanowire (NW) MOSFETs, as one promising candidate for future VLSI, have attracted much more attention. Stress engineering is one effective method to improve the channel drive current and has been widely investigated in bulk MOSFETs [1], UTB MOSFETs [2] and FinFETs [3]. However, study on stressed Si Gate-All-Around (GAA) NWs is still quite limited [4], especially on (110) SOI. In this work, μ as well as I modulations in (110) Si GAA NWs nFETs are studied under uniaxial tensile stress for the first time. It is observed that mobility enhancement in nanowires can be achieved by longitudinal stress in both [100]- and [110]-directed NW nFETs, which are similar to those in bulk MOSFETs [1] and FinFETs [3]. Furthermore, it is also found that larger enhancements can be obtained in narrower NWs, which is promising for future device scaling down. Underlying physical mechanisms are discussed here. |
| Starting Page | 1 |
| Ending Page | 2 |
| File Size | 207404 |
| Page Count | 2 |
| File Format | |
| ISBN | 9781424460304 |
| DOI | 10.1109/ISDRS.2009.5378148 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-12-09 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Nanowires MOSFETs Silicon on insulator technology Tensile stress FinFETs Stress measurement Educational institutions Very large scale integration Capacitance measurement FETs |
| Content Type | Text |
| Resource Type | Article |
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