NDLI: First order, quasi-static MOSFET bulk charge model showing inconsistencies in the BSIM power dissipation model

Content Provider	IEEE Xplore Digital Library
Author	Sharma, S. Johnson, L.G.
Copyright Year	2009
Description	Author affiliation: Department of Electrical and Computer Engineering, Oklahoma State University, USA (Johnson, L.G.) \|\| Department of Electrical and Computer Engineering, Trine University, USA (Sharma, S.)
Abstract	The accurate modeling of the MOSFET channel capacitance has evolved from Meyer's [1] reciprocal gate capacitive models to Ward's [2] charge-based, channel partition models. Numerous models [3–4] have also been proposed to represent trans-capacitive and charging current components. Recently, we also proposed a solution to separate the transport and charging current components [5] for SOI MOSFET's. Our model also verified that Ward's method of channel charge partitioning worked correctly as long as the charge had a linear dependence on the channel potential. In this work, we have taken advantage of a linear approximation to extend our previous research on the first order power model for SOI MOSFET's [5] to include the BULK MOS transistors. In our previous work • The first order conserved and dissipative powers were calculated without the channel partition from the first order charge and currents. • Energy conservation was verified by calculating an energy function, and • The stored energy function was calculated from all of the conserved components. All this is still possible in the Berkeley Short Channel IGFET (BSIM) Bulk Charge Model [6] if the derivatives of the bulk charge coefficient, Abulk, by the source potential, vsb, are assumed to be negligible. These assumptions are necessary to obtain simplified capacitance equations [7] and to verify the existence of an energy function [8].
Starting Page	1
Ending Page	2
File Size	88111
Page Count	2
File Format	PDF
ISBN	9781424460304
DOI	10.1109/ISDRS.2009.5378192
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-09
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Power MOSFET Power dissipation Equations Educational institutions Capacitance Energy conservation Linear approximation MOS devices Charge transfer
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

First order quasi-static SOI MOSFET channel capacitance model

A new non-quasi-static non-linear MOSFET model based on physical analysis

Nanometer bulk-driven applications MOSFET model analysis

A Non-Quasi-Static SOI MOSFET Model

A first-order charge conserving MOS capacitance model

Comparative analysis of methods used for irradiated power MOSFET characterization

Parametric yield estimation for a MOSFET integrated circuit

Compact Model for Electric Field at Pinch-Off and Channel Length Shortening in Bulk MOSFET

Compact Model for Electric Field at Pinch-Off and Channel Length Shortening in Bulk MOSFET

First order, quasi-static MOSFET bulk charge model showing inconsistencies in the BSIM power dissipation model

Similar Documents

First order quasi-static SOI MOSFET channel capacitance model

A new non-quasi-static non-linear MOSFET model based on physical analysis

Nanometer bulk-driven applications MOSFET model analysis

A Non-Quasi-Static SOI MOSFET Model

A first-order charge conserving MOS capacitance model

Comparative analysis of methods used for irradiated power MOSFET characterization

Parametric yield estimation for a MOSFET integrated circuit

Compact Model for Electric Field at Pinch-Off and Channel Length Shortening in Bulk MOSFET

Compact Model for Electric Field at Pinch-Off and Channel Length Shortening in Bulk MOSFET

First order, quasi-static MOSFET bulk charge model showing inconsistencies in the BSIM power dissipation model