NDLI: “Thin silicon solar cells: A path to 35% shockley-queisser limits”, a DOE funded FPACE II project

Content Provider	IEEE Xplore Digital Library
Author	Ding, L. Boccard, M. Williams, J. Jeffries, A. Gangam, S. Ghosh, K. Honsberg, C. Bowden, S. Holman, Z. Atwater, H. Buonassisi, T. Bremner, S. Green, M. Ballif, C. Bertoni, M.
Copyright Year	2014
Description	Author affiliation: Ecole Polytech. Fed. de Lausanne, Neuchatel, Switzerland (Ballif, C.) \|\| Massachusetts Inst. of Technol., Cambridge, MA, USA (Buonassisi, T.) \|\| California Inst. of Technol., Pasadena, CA, USA (Atwater, H.) \|\| Univ. of New South Wales, Sydney, NSW, Australia (Bremner, S.; Green, M.) \|\| Arizona State Univ., Tempe, AZ, USA (Ding, L.; Boccard, M.; Williams, J.; Jeffries, A.; Gangam, S.; Ghosh, K.; Honsberg, C.; Bowden, S.; Holman, Z.; Bertoni, M.)
Abstract	Crystalline silicon technology is expected to remain the leading photovoltaic industry workhorse for decades. We present here the objectives and workplan of a recently launched project funded by the U.S. Department of Energy through the Foundational Program to Advance Cell Efficiency II (FPACE II), which aims at leading crystalline silicon to an efficiency breakthrough. The project will tackle fundamental approach of materials design, defect engineering, device simulations and materials growth and characterization. Among the main novelties, the implementation of carrier selective contacts made of wide bandgap material or stack of materials is investigated for improved passivation, carrier extraction and carrier transport. Based on an initial selection of candidate materials, preliminary experiments are conducted to verify the suitability of their critical parameters as well as preservation of the silicon substrate surface and bulk properties. The target materials include III-V and metal-oxide materials.
Starting Page	2467
Ending Page	2470
File Size	512782
Page Count	4
File Format	PDF
e-ISBN	9781479943982
DOI	10.1109/PVSC.2014.6925429
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon Photovoltaic cells Gallium nitride Photonic band gap Passivation Pollution measurement silicon carrier selective contacts crystalline silicon solar cells passivation quality photovoltaic cells
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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