NDLI: Development and evaluation of a high resolution CMOS Image Sensor with 17 μm × 17 μm pixel size for X-ray imaging

Content Provider	IEEE Xplore Digital Library
Author	Jun Hyung Bae Jongyul Kim Dong-uk Kang Gyuseong Cho
Copyright Year	2010
Description	Author affiliation: Department of Nuclear & Quantum Engineering, Korea Advanced Institute of Science and Technology, 335 Gwahangno, Yuseong-gu, Daejeon 305-701, Republic of Korea (Jun Hyung Bae; Jongyul Kim; Dong-uk Kang; Gyuseong Cho)
Abstract	In this research, we designed and fabricated a CIS (CMOS Image Sensor) with 17 μm × 17 μm pixel size and 190 × 190 pixels using 0.25 μm standard CMOS process as a testversion sample for developing high resolution X-ray image sensors. Active pixel sensors, area efficient sample and hold circuits, and a switched capacitor amplifier are integrated in a single chip. A unit pixel of the sensor consists of a photodiode and a 3-transitor active pixel structure. A sample and hold circuit is designed to reduce silicon area by including only one capacitor. Finally, a current mirrored operational transconductance amplifier is used to construct a switched capacitor amplifier. Also, in order to analyze the characteristics of the CIS and obtain images, we developed a data acquisition system. The system is responsible for communicating with a personal computer as well as controlling the CIS and an external ADC. The evaluation procedure of the CIS is divided into two categories: one is to investigate the performance of the CIS itself, and the other is to evaluate the quality of the obtained image. We measured not only the linearity, sensitivity and charge-to-voltage conversion gain of the CIS, but also the spatial resolution of the X-ray image acquired by the CIS coupled with a CsI(Tl) scintillator.
Starting Page	1062
Ending Page	1066
File Size	634728
Page Count	5
File Format	PDF
ISBN	9781424491063
ISSN	10957863
e-ISBN	9781424491056
DOI	10.1109/NSSMIC.2010.5873929
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-10-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	X-ray imaging Pixel Spatial resolution CMOS image sensors Detectors Sensitivity Capacitors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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