NDLI: Reworkable underfills for flip chip, BGA, and CSP applications

Content Provider	IEEE Xplore Digital Library
Author	Lejun Wang Suk Chae Kang Haiying Li Baldwin, D.F. Wong, C.P.
Copyright Year	2000
Description	Author affiliation: Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA (Lejun Wang)
Abstract	Underfill is a polymeric material used in the flip-chip devices that fills the gap between an IC chip and an organic board, and encapsulates the solder interconnects. This underfill material can dramatically enhance the reliability of the flip-chip devices as compared to the non-underfilled devices. Current underfills are mainly epoxy-based materials that are not reworkable after curing, which places an obstacle in Flip-Chip on Board (FCOB) technology developments. Reworkable underfill is not only the key material to address the non-reworkability of the FCOB packages, but it can also be used to enhance the board-level reliability of BGA, CSP devices without losing their good reworkability feature. The objectives of this study are to determine the process viability, material performance, and reliability of reworkable underfills for advanced area array packaging and assembly technologies. Several reworkable underfills along with standard non-reworkable underfills (baseline materials) are evaluated in the study. Rework processes for BGA, CSP and flip chip devices are developed. Reworkable underfills allow flip chip, BGA, and CSP packages to be reworked using developed rework processes, while standard underfills show no reworkability. Reliability assessment of these reworkable underfills is ongoing.
Starting Page	914
Ending Page	919
File Size	579392
Page Count	6
File Format	PDF
ISBN	0780359089
DOI	10.1109/ECTC.2000.853274
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-05-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Chip scale packaging Materials reliability Curing Integrated circuit packaging Fatigue Integrated circuit interconnections Assembly Electronics packaging Printed circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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