NDLI: An analysis of interface delamination in flip-chip packages

Content Provider	IEEE Xplore Digital Library
Author	Mercado, L.L. Sarihan, V. Hauck, T.
Copyright Year	2000
Description	Author affiliation: Interconnect Syst. Labs., Motorola Inc., Tempe, AZ, USA (Mercado, L.L.)
Abstract	Interface delamination is an important failure mode for flip-chip PBGA (plastic ball grid array) packages. It plays a significant role on package performance and reliability. In this paper, a fracture mechanics approach is utilized to evaluate the impact of interface delamination on package reliability. Interface cracks are mixed mode cracks with both mode I (opening mode) and mode II (shear mode) components. To characterize the interfaces in electronic packages, it is essential to define the interfacial toughness as a function of different mode mixity, or loading phase angle. In this paper, interface fracture mechanics is incorporated into finite element analysis to determine the critical interface fracture parameters. The proposed methodology is validated against analytical solutions. A Flip-Chip PBGA package with underfill delamination is studied. The effect of temperature, initial delamination length, package geometry and materials on the fracture parameters is evaluated.
Starting Page	1332
Ending Page	1337
File Size	600574
Page Count	6
File Format	PDF
ISBN	0780359089
DOI	10.1109/ECTC.2000.853350
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-05-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delamination Electronics packaging Finite element methods Performance analysis Testing Shearing Tensile stress Laboratories Postal services Plastics
Content Type	Text
Resource Type	Article

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