NDLI: An overview of MCM/KGD development activities in Japan

Content Provider	IEEE Xplore Digital Library
Author	Sudo, T.
Copyright Year	2000
Description	Author affiliation: Corp. Manuf. Eng. Centre, Toshiba Corp., Japan (Sudo, T.)
Abstract	The MCM/KGD study group in EIAJ (Electronic Industries Association of Japan) surveyed the activities on MCM related technologies and the future perspectives up to 2010. The high density packaging technology had been driven by supercomputers and mainframes for a long time. Recently, high performance microprocessors become available for consumer products such PDAs (personal digital assistants), Notebook PCs (personal computers), digital cameras and so on. Then, MCM is a key technology to make these consumer products smaller, lighter and thinner. Area array packages such as BGA (ball grid array), CSP (chip scale package) are key components to reduce the occupied area. Wafer-level CSP will be a new approach to supply KGD in a minimum assembly cost by handling in a wafer level instead of a die level. Build-up type printed circuit board is essential to mount both CSPs and flip-chipped dies with fine-pitch I/O terminals. Test methodology for burn-in and testing must be improved to provide low cost KGD (Known good die) in the future.
Starting Page	805
Ending Page	809
File Size	560329
Page Count	5
File Format	PDF
ISBN	0780359089
DOI	10.1109/ECTC.2000.853253
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-05-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Chip scale packaging Electronics packaging Consumer products Personal digital assistants Wafer scale integration Costs Circuit testing Electronics industry Supercomputers Microprocessors
Content Type	Text
Resource Type	Article

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