NDLI: New high-density multilayer technology on PCB

Content Provider	IEEE Xplore Digital Library
Author	Shimoto, T. Matsui, K. Shimada, Y. Utsumi, K.
Copyright Year	1998
Description	Author affiliation: Mater. Dev. Center, NEC Corp., Kawasaki, Japan (Shimoto, T.)
Abstract	We have developed a new high-density multilayer technology on PCB (Printed Circuit Board), named DSOL (Deposited Substrate On Laminate) technology. The first characteristic of the DSOL technology is the dielectric fabrication, which uses a new photosensitive material, a bulky fluorene unit bonded epoxy acrylate resin. The fluorene based resin has interesting properties such as good electrical properties, low curing temperature (160/spl deg/C) for a heat-resistant resin (glass transition temperature: 230/spl deg/C), low coefficient of thermal expansion (40 ppm), and high resolution. In particular, the dielectric formation process has the advantage that fine and high-aspect-ratio via holes are formed on FR-4 laminates through exactly the same process and manufacturing facilities as a conventional photosensitive epoxy resin. The second characteristic is the technology which patterns fine-pitch copper conductors using a semi-additive process with a sputtering method. This technology makes 40 /spl mu/m pitch lines on large-area laminates possible, as this process consists of flash wet etching of only 0.3 /spl mu/m thick sputtered thin-films. We have successfully developed a high-density packaging substrate for high-pin-count area array ASIC (Application Specific Integrated Circuit) chips (3828 pins). A high-density substrate based on the DSOL technology is the most suitable for achieving high-density packages (MCMs, CSPs, and BGAs) using fine-pitch and area array interconnection technologies.
Starting Page	158
Ending Page	164
File Size	1122596
Page Count	7
File Format	PDF
ISBN	0780345266
ISSN	05695503
DOI	10.1109/ECTC.1998.678686
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-05-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Nonhomogeneous media Laminates Resins Integrated circuit technology Dielectric substrates Temperature Integrated circuit packaging Application specific integrated circuits Printed circuits Fabrication
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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