NDLI: Analysis of delamination in IC packages using a new variable-order singular boundary element

Content Provider	IEEE Xplore Digital Library
Author	Tay, A.A.O. Lee, K.H. Lim, K.M.
Copyright Year	1998
Description	Author affiliation: Centre for IC Failure Anal. & Reliability, Nat. Univ. of Singapore, Singapore (Tay, A.A.O.)
Abstract	Delamination of interfaces in IC packages gives rise to electrical and mechanical failures such as popcorn cracking. Hence it is important to be able to analyse the mechanics of delamination from small interfacial defects which may exist at interfaces due to contamination or random factors. This paper describes the mechanics of interfacial delamination and the application of the boundary element method to analysing delamination propagation at interfaces. Now, a crack tip at an interface between two materials has an order of singularity which is a function of the material properties. For an accurate analysis, a special variable-order singular boundary element has been developed and used. The effect of defect size and location along the pad-encapsulant interface on interfacial delamination has been studied. It was found that the energy release rate or stress intensity factor increases with defect size as well as proximity to the pad corner. This implies that when a small delamination near a pad corner delaminates the crack tip nearer the pad corner will propagate first. The analysis also shown that this delamination. Once started, will continue until the crack tip reaches the pad corner. If the variation of interface toughness as a function of mode mixity is known, the delamination propagation behaviour can be determined. Depending on the shape of the curve describing the variation of interface toughness with mode mixity, the delamination growth can either be stable, catastrophic or initial unstable followed by stable growth.
Starting Page	936
Ending Page	943
File Size	860337
Page Count	8
File Format	PDF
ISBN	0780345266
ISSN	05695503
DOI	10.1109/ECTC.1998.678821
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-05-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delamination Integrated circuit packaging Thermal stresses Material properties Plastic integrated circuit packaging Bonding Failure analysis Contamination Boundary element methods Shape
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in