Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Petefish, W.G. Noddin, D.B. Hanson, D.A. Gorrell, R.E. Syvester, M.F. |
| Copyright Year | 1998 |
| Description | Author affiliation: W.L. Gore & Assoc., Eau Clair, WI, USA (Petefish, W.G.) |
| Abstract | High performance logic ICs are rapidly migrating from peripheral bonded package configurations to area array, flip chip configurations. Total die I/O is exploding from <800 pins to more than 3500 pins with little abatement in the rate of increase in total silicon area. Traditional flip chip package substrate technologies, such as co-fired ceramic, are not able to adequately support this growing industry trend due to inherent limitations in thermal cycling reliability of the level 2 interface, density, electrical performance, and cost of use. A new, cost effective, organic flip chip package substrate technology has been developed, prototyped, qualified, and is being ramped into production. This laminated technology uses a nonwoven polytetrafluoroethylene (PTFE) composite dielectric combined with a fabrication technology that has produced the highest density organic substrates yet disclosed. The technology has been used to fabricate packages for die up to 18.5 mm by 18.5 mm with more than 3800 total I/O. Body sizes of up to 45 mm have been fabricated. In this paper, we will discuss the materials of construction, process technology, reliability characterization, thermo-mechanical characterization, and electrical performance of various cross-sections using this new technology. |
| Starting Page | 1089 |
| Ending Page | 1097 |
| File Size | 1316333 |
| Page Count | 9 |
| File Format | |
| ISBN | 0780345266 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.1998.678850 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1998-05-25 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Flip chip Packaging Dielectric substrates Logic arrays Pins Costs Bonding Silicon Ceramics industry Electrical products industry |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|