NDLI: The effect of wells on gate oxide charging during plasma processing

Content Provider	IEEE Xplore Digital Library
Author	Linder, B.P. En, W.G. Cheung, N.W.
Copyright Year	1996
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA (Linder, B.P.)
Abstract	The effect of wells and substrate type on gate oxide charging during Plasma Immersion Ion Implantation is modeled. The simulation combines the equations governing the plasma currents and integrated circuit device models to determine the gate oxide stressing voltage during implantation. Depending on the substrate type and the surface potential (V/sub s/), a depletion region may exist, reducing the gate oxide voltage, and hence the gate oxide damage. This occurs for a P-substrate with a positive V/sub s/ and for an N-substrate with a negative V/sub s/. Well structures by the nature of their capacitance, modulate V/sub s/, altering the oxide stressing voltage. P-wells result in a more positive V/sub ox/, while N-wells result in a more negative V/sub ox/. Experimental results confirm the substrate effect, while they are inconclusive on the effect of wells. Including both the substrate and well effects results in a more complete picture of oxide charging.
Starting Page	788
Ending Page	791
File Size	497099
Page Count	4
File Format	PDF
ISBN	078033289X
DOI	10.1109/IIT.1996.586575
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-06-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Plasma materials processing Plasma immersion ion implantation Plasma simulation Voltage Plasma devices Integrated circuit modeling Circuit simulation Equations Surface charging Capacitance
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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