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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Saettler, P. Boettcher, M. Wolter, K.-J. |
| Copyright Year | 2012 |
| Description | Author affiliation: Technische Universität Dresden, Electronics Packaging Laboratory, D-01062 Dresden, Germany (Saettler, P.; Wolter, K.-J.) || FhG ASSID, Dresden Germany (Boettcher, M.) |
| Abstract | Herein we describe the annealing behavior of copper Through Silicon Vias (TSVs) in a series of experiments. Temperatures ranged from 150 °C to 450 °C and the dwell of the temperature varied between 30 min and 4 h. Copper protrusion, test samples warpage and the copper microstructure were examined in a subsequent characterization. Combining the results of these measurements enables the determination of an optimized temperature and dwell set, which avoids further protrusion and minimizes stress after annealing. Additionally, the data analysis shows a temperature- and dwell-dependency of copper protrusion and die warpage. Electron backscatter diffraction (EBSD) measurements on TSV cross sections show changes of the micro structure. Hence it could be verified that copper underwent grain growth during annealing. The described investigations represent a new systematic approach for the characterization of the copper annealing behavior in TSVs. The evaluation of the specific experiments and the comparison between different annealing conditions enable insights into the structural changes of the material during the annealing process. With help of the implemented characterization this approach succeeds in giving optimized settings for the TSV annealing process. Based on the measurement data it is possible to choose a suitable temperature and dwell process set depending on subsequent redirection layer (RDL) processing steps. Furthermore a model for the annealing procedure in TSVs is derived from the measurement results. |
| Starting Page | 619 |
| Ending Page | 624 |
| File Size | 1916225 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781467319669 |
| ISSN | 05695503 |
| e-ISBN | 9781467319652 |
| e-ISBN | 9781467319645 |
| DOI | 10.1109/ECTC.2012.6248895 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2012-05-29 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Annealing Copper Temperature measurement Stress Through-silicon vias Materials Microstructure |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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