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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wei Chung Wang Lee, F. Weng, G.L. Tai, W. Ju, M. Chuang, R. Weileun Fang |
| Copyright Year | 2007 |
| Description | Author affiliation: Adv. Semicond. Eng. Inc., Kaohsiung (Wei Chung Wang; Lee, F.; Weng, G.L.; Tai, W.; Ju, M.; Chuang, R.) |
| Abstract | Package on package (PoP) is a package technology placing one package on top of another to integrate different functionalities while still remains a compact size. PoP offers procurement flexibility, lower cost of ownership, better total system costs and faster time to market. Normally designers use top package for memory application and bottom package for ASIC, Baseband or Processor application. By using this PoP technology, the memory KGD issue can be mitigated since the memory to be integrated with bottom package can be burn-in and tested before integration with bottom package. In addition; the development cycle time and cost can be reduced since memory is decoupled from ASIC/Baseband/Processor from the perspective of qualification, yield, sourcing, procurement timing and logistic handling. However, stringent coplanarity control for bottom package is necessary to ensure high package stacking yield when combining with top packages that are normally coming from different sources with different warpage behavior. Besides, the customized mold chase fabrication is costly and time consuming for product prototyping. A state-of-the-art 3D package integration platform based on current FBGA infrastructure had been proposed, developed and validated to resolve the issues listed above and yet is complied with JEDEC package outline standard for PoP. |
| Starting Page | 743 |
| Ending Page | 747 |
| File Size | 3930458 |
| Page Count | 5 |
| File Format | |
| ISBN | 1424409845 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2007.373880 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-05-29 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Packaging Costs Procurement Application specific integrated circuits Baseband Time to market Testing Qualifications Timing Logistics |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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