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Content Provider | IEEE Xplore Digital Library |
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Author | Modi, M. Sitaraman, S.K. |
Copyright Year | 2002 |
Description | Author affiliation: Comput.-Aided Simulation of Packaging Reliability Lab., Georgia Inst. of Technol., Atlanta, GA, USA (Modi, M.; Sitaraman, S.K.) |
Abstract | Delamination of intrinsically stressed films is commonly encountered in microelectronic systems. Thin films deposited through physical vapor deposition processes typically accrue intrinsic stresses through the micro structural variations caused by deposition or through thermally induced stresses imposed during cool-down from deposition temperatures. These intrinsic stresses can have a peak magnitude upwards of I GPa. To help prevent delamination, Ti or Cr "adhesive" layers, with microscale or nanoscale thickness, are used to increase the adhesion between the thin film and substrate. This study applies the Finite Element Method (FEM) to study the resistance to delamination of an innovative, stress-engineered, thin film interconnect. Adhesive layer parameters such as thickness, deposition-induced intrinsic stress, and material properties are examined. Fracture criteria (energy release rate and mode mixity) are used to quantify the effect of varying adhesive layer properties on interfacial fracture. The finite element study results are compared to a previously developed plate theory model, which does not account for the large deflection present in highly stressed film delamination. To determine whether a delamination will propagate, it is imperative that the interfacial fracture toughness be experimentally measured for the interface under study. Experimental measurement of interfacial fracture toughness and the associated mode mixity is currently a challenge for thin film interfaces. In addition to the numerical simulation, this paper discusses modifications to the decohesion test that yields a method that can tightly bound the interfacial fracture toughness using a single test wafer. Further it is a method that uses common IC fabrication techniques, can achieve low mode mixities easily and efficiently, and can be used with titanium interfaces. Results for Ti/Alumina interfacial fracture toughness are discussed and applied to the numerical study. |
Sponsorship | IEEE Components, Packaging, & Manuf. Technol. Soc. Electronic Components, Assemblies & Mater. Assoc |
Starting Page | 847 |
Ending Page | 853 |
File Size | 802487 |
Page Count | 7 |
File Format | |
ISBN | 0780374304 |
ISSN | 05695503 |
DOI | 10.1109/ECTC.2002.1008199 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2002-05-28 |
Publisher Place | USA |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Transistors Delamination Thermal stresses Finite element methods Testing Microelectronics Sputtering Chemical vapor deposition Temperature Chromium |
Content Type | Text |
Resource Type | Article |
Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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