NDLI: Experimental/numerical analysis of halogen-free printed circuit board assembly under board level drop test

Content Provider	IEEE Xplore Digital Library
Author	Chau-Jie Zhan Hung-Jen Chang Tao-Chih Chang Jung-Hua Chou
Copyright Year	2009
Description	Author affiliation: Electronics and Optoelectronics Research Laboratories, Industrial Technology Research Institute, 195, Sec. 4, Chung Hsing Rd., Chutung, Hsinchu, Taiwan 31040, R.O.C. (Chau-Jie Zhan; Tao-Chih Chang) \|\| Dept. of Engineering Science, National Cheng Kung University, No.1, University Road, Tainan City, Taiwan 701, R.O.C. (Hung-Jen Chang; Jung-Hua Chou)
Abstract	After the adoption of lead-free electronic products, the halogen-free electronic products are expected to increase in the coming years for environmental protection and green electronics. Currently, for evaluating the drop resistance of handheld electronic products, the board level drop test method is typically employed. In this study, the finite elements analysis was used to analyze the drop responses of totally halogen-free PCBA and the simulation results were verified by drop tests. The outer layers of the halogen-free test board were built-up by resin coated copper (RCC) material. According to the JESD22-B111 standard, five PBGA components with Sn-4Ag-0.5Cu solder balls were mounted on the test board by the Sn-1Ag-0.5Cu solder paste. The ANASYS software was employed to analyze the stress distribution in the joint structures which contained the solder ball, copper pad, and build-up material during drop impacts. The sub-modeling simulation method was used to improve the accuracy and convergence of the simulation results. In addition, by using the support excitation scheme, the contact moment in the impact process during the drop test was translated into effective support excitation loads to simplify the analysis. From the drop test results, failure analysis showed that most of the fractures occurred around the pad on the test board first and then cracks propagated across the outer build-up material. Finally, the inner copper trace was fractured due to the propagated cracks, resulting in the failure of the PCB side. The simulation revealed that the maximum normal stress was located at the outmost solder balls in the PCB side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.
Starting Page	381
Ending Page	384
File Size	1670555
Page Count	4
File Format	PDF
ISBN	9781424443413
DOI	10.1109/IMPACT.2009.5382197
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-21
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Materials testing Analytical models Numerical analysis Environmentally friendly manufacturing techniques Printed circuits Failure analysis Copper Circuit testing Assembly Stress
Content Type	Text
Resource Type	Article

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