NDLI: Multi-scale measurement of the change of the residual stress in a silicon chip during manufacturing from thin-film processing to packaging

Content Provider	IEEE Xplore Digital Library
Author	Kishi, H. Sasaki, T. Ueta, N. Suzuki, K. Miura, H.
Copyright Year	2009
Description	Author affiliation: Department of Nanomechanics, Graduate School of Engineering, Tohoku University, 6-6-11-716 Aoba, Aramaki, Aoba-ku, Sendai, Miyagi 980-8579, Japan (Kishi, H.; Sasaki, T.; Ueta, N.; Suzuki, K.; Miura, H.)
Abstract	Both thermal and intrinsic stresses that occur during thin-film processing and packaging dominate the final residual stress in thin film electronic devices. Since the residual stress causes the shift of electronic functions of dielectric and semiconductor materials, these shifts sometimes degrade their performance and reliability. Therefore, it is very important to measure and control the residual stress in thin-film-applied products. In this study, the changes of the electronic performance of MOS transistors by mechanical stress were measured by applying a four-point bending method. The stress sensitivity of the transconductance of NMOS transistors increased from about 1%/100-MPa to about 15%/100-MPa by decreasing the gate length of the transistors from 400 nm to 150 nm. So, it showed miniaturization of transistors increased the stress sensitivity of the performance. One of the estimated important factors which dominated this increase was attributed to the interference of stress concentration fields occurred at the edges of gate electrodes. The change of the residual stress in a transistor structure caused by deposition of thin films was analyzed by applying a finite element method (FEM). The estimated change was validated by experiment using originally developed stress sensing chips. The estimated change of the stress due to deposition of gate electrode tungsten film was about 25MPa. The measured average stress was about 20MPa and it agreed well with the estimated value. Next, the change of the residual stress caused by the interference of the stress concentration field between gate-electrodes was validated by applying this stress sensing chip. The measured change of the stress caused by making one slit by focused ion beam was about 70MPa and it agreed well with the estimated value of about 60MPa. In addition, the change of residual stress was increased with the more decreased width of slits. It was confirmed, therefore, that both the thin film process-induced stress and the packaging-induced stress change the final residual stress in a transistor structure and the change can be evaluated by our stress-sensing chip quantitatively.
Starting Page	293
Ending Page	296
File Size	3730259
Page Count	4
File Format	PDF
ISBN	9781424443413
DOI	10.1109/IMPACT.2009.5382116
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-21
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Semiconductor device measurement Manufacturing processes Semiconductor thin films Dielectric thin films Electronic packaging thermal management Silicon Residual stresses Thin film transistors Semiconductor device packaging Stress measurement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Evaluation of residual stress in a transistor using micron scale strain sensors

Measurement of residual stresses in flip chip underfill resins

A new stress chip design for electronic packaging applications

Residual stress in thin-film parylene-c

Evaluating Interface Effect On Stresses In Thin Films By A Local Curvature Metrology With High Accuracy And Resolution

Polyimide stress buffers in IC technology

New mechanical reliability issues for deep-submicron devices

Structural effect of IC plastic package on residual stress in silicon chips

Stresses in electroless Ni-P films for electronic packaging applications

Multi-scale measurement of the change of the residual stress in a silicon chip during manufacturing from thin-film processing to packaging

Similar Documents

Evaluation of residual stress in a transistor using micron scale strain sensors

Measurement of residual stresses in flip chip underfill resins

A new stress chip design for electronic packaging applications

Residual stress in thin-film parylene-c

Evaluating Interface Effect On Stresses In Thin Films By A Local Curvature Metrology With High Accuracy And Resolution

Polyimide stress buffers in IC technology

New mechanical reliability issues for deep-submicron devices

Structural effect of IC plastic package on residual stress in silicon chips

Stresses in electroless Ni-P films for electronic packaging applications

Multi-scale measurement of the change of the residual stress in a silicon chip during manufacturing from thin-film processing to packaging