NDLI: A cryogenic and low noise front End electronics for high capacitance detector

Content Provider	IEEE Xplore Digital Library
Author	Bechetoille, E. Mathez, H.
Copyright Year	2013
Description	Author affiliation: Inst. de Phys. Nucl. de Lyon, Univ. de Lyon 1, Villeurbanne, France (Bechetoille, E.; Mathez, H.)
Abstract	A cryogenic and low noise front end has been developed first for T2K experiment. The latest developments are aimed for LAGUNA LBNO, which is a long term neutrino project (year 2020). A middle term detector will be build at CERN in 2015. However, the current design is being mounted on a small Time Projection Chamber (TPC) in our laboratory. The identical channel of this 8-channel chip is made of a low noise Charge Sensitive Amplifier (CSA) with respectively 500fF and 2MΩ feedback network $(C_{pa}//R_{pa}).$ The CSA is followed by a 1μs bandpass filter and a buffer line driver. The input referred noise level requires at least 1500 $e^{-}$ rms at -150°C with an input detector capacitance of 250pF. With such performance, the minimal signal of 18000e- (2.88fC) will be correctly measured. This front end is implemented in AMS 350nm CMOS process.
Starting Page	1
Ending Page	3
File Size	556555
Page Count	3
File Format	PDF
e-ISBN	9781479905348
DOI	10.1109/NSSMIC.2013.6829776
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-27
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Noise Detectors Transistors Temperature measurement Liquids Capacitance Argon
Content Type	Text
Resource Type	Article

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