NDLI: Next generation Associative Memory devices for the FTK tracking processor of the ATLAS experiment

Content Provider	IEEE Xplore Digital Library
Author	Andreani, A. Annovi, A. Beccherle, R. Beretta, M. Citterio, M. Crescioli, F. Colombo, A. Giannetti, P. Liberali, V. Shojaii, J. Stabile, A.
Copyright Year	2013
Description	Author affiliation: LPNHE, IN2P3, Paris, France (Crescioli, F.) \|\| INFN Lab. Naz. di Frascati, Frascati, Italy (Annovi, A.; Beretta, M.) \|\| INFN Pisa, Pisa, Italy (Beccherle, R.; Giannetti, P.) \|\| INFN Milano, Milan, Italy (Andreani, A.; Citterio, M.; Colombo, A.; Liberali, V.; Shojaii, J.; Stabile, A.)
Abstract	The AMchip is a VLSI device that implements the Associative Memory function, a special content addressable memory specifically designed for high energy physics applications and first used in the CDF experiment at Tevatron. The 4th generation of AMchip has been developed for the core pattern recognition stage of the Fast TracKer (FTK) processor: a hardware processor for online reconstruction of particle trajectories at the ATLAS experiment at LHC. We present the architecture, design considerations, power consumption and performance measurements of the 4th generation of AMchip. We present also the design innovations toward the 5th generation and the first prototype results.
Starting Page	1
Ending Page	6
File Size	356743
Page Count	6
File Format	PDF
e-ISBN	9781479905348
DOI	10.1109/NSSMIC.2013.6829550
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-27
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer architecture Microprocessors Power demand Computer aided manufacturing Associative memory Silicon IP networks ATLAS Associative Memory FTK Trigger
Content Type	Text
Resource Type	Article

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