NDLI: A prototype of self-triggering front-end unit for radio detection of ultra high energy neutrinos

Content Provider	IEEE Xplore Digital Library
Author	Haichuan Lin Zhen-An Liu Martineau-Huynh, O. Fang Guo Chunjie Wang Jingzhou Zhao Wei Lu
Copyright Year	2013
Description	Author affiliation: State Key Lab. of Particle Detection & Electron., Inst. of High Energy Phys., Beijing, China (Zhen-An Liu) \|\| LPNHE, Univ. Paris 6, Paris, France (Martineau-Huynh, O.) \|\| State Key Lab. of Particle Detection & Electron., Inst. of High Energy Phys.(IHEP), Beijing, China (Haichuan Lin) \|\| IHEP, Beijing, China (Fang Guo; Chunjie Wang; Jingzhou Zhao; Wei Lu)
Abstract	Since the Tianshan Radio Experiment for Neutrino Detection (TREND) has successfully announced its first result, the Giant Radio Array for Neutrino Detection (GRAND) prototype is proposed to validate the concept of extensive air shower detection with a very high background rejection. High speed digitizing (1GHz), 12bits dynamic range and less than 10ns timing precision based on GPS are expected in the GRAND prototype experiment. This paper describes the overall structure of the data acquisition for GRAND prototype, concentrating on the development of the front-end electronics. The self-triggering front-end unit is a key part of the electronics system. It generally consists of two trigger boards (FTRIG), one digitizing board (DFADC), and one timestamp board (GPSTIM). Its main function is to get the amplitude and time stamp information of the input signal from the antenna. FTRIG board is for fast hardware trigger; GPSTIM board is for time stamp based on GPS (RMS <; 10ns); DFADC board is for dual 12bits 1GHz digitizing and fiber transmission. A prototype of the self-triggering front-end unit was built and a field test confirmed the full functionality of the prototype. The new prototype is considered to be evaluated on the speed and reliability as the ultimate design.
Starting Page	1
Ending Page	3
File Size	178140
Page Count	3
File Format	PDF
e-ISBN	9781479905348
DOI	10.1109/NSSMIC.2013.6829558
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-27
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Prototypes Neutrino sources Antennas Field programmable gate arrays Clocks Market research Timing neutrino detection front-end unit radio detection
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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