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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Matsumoto, T. Qiang Yu Shibutani, T. Matsuzaki, T. |
| Copyright Year | 2008 |
| Description | Author affiliation: Dept. of Mech. Eng. & Mater. Sci., Yokohama Nat. Univ., Yokohama, Japan (Matsumoto, T.; Qiang Yu; Shibutani, T.; Matsuzaki, T.) |
| Abstract | Interconnect technology is the key to the reliability of electronic devices. Electronic components are soldered to a printed circuit board (PCB). Major failure mode is thermal fatigue of solder joints since there is a big difference in the coefficient of thermal expansion (CTE) between soldered components. Underfill resin is used to improve the interconnect reliability. Resin can relief stresses in solder joints due to the mismatch in CTE. On the other side, resin creates another reliability concern to interfacial failures of metal/resin and ceramic/resin. Interfacial failure has been often evaluated as the fracture toughness based on fracture mechanics, where the interface is assumed as the boundary of components and has a perfect bonding. Then, the stress intensity factor is a key parameter to evaluate the interfacial strength. However, in the case of electronic devices, since there are a lot of new materials and since new combination of materials has a different interfacial strength another methodology of estimating the interfacial strength is being required. Actually, the interface such as resin/ceramics has an imperfect bonding and consists of small structures. In this study, an alternative approach for evaluating the interfacial strength of resin in electronic components was proposed. Based on the scanning electron microscopy (SEM) observation, finite element models were constructed. The models consist of two components and interfacial layer. Parametric FEA study revealed that stresses are affected by small structures of the interface layer. It means that small structure should be considered to estimate an interfacial strength. Experiments were carried out to verify the proposed approach. 3-point bending test was performed for a specimen consisting of a silicon chip, an epoxy resin and a FR-4 substrate. Delamination load was measured as interfacial strength. FEA of the 3-point bending test was also performed to estimate the critical load for delamination. Proposed approach agrees with experimental results. |
| Starting Page | 816 |
| Ending Page | 820 |
| File Size | 2998784 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424421176 |
| DOI | 10.1109/EPTC.2008.4763532 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-12-09 |
| Publisher Place | Singapore |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Delamination Resins Silicon Integrated circuit interconnections Electronic components Thermal expansion Soldering Ceramics Bonding Stress |
| Content Type | Text |
| Resource Type | Article |
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