NDLI: Advanced Opportunity Cost Analysis of 3D Packaging Technologies

Content Provider	IEEE Xplore Digital Library
Author	Bauer, C.E. Neuhaus, H.J.
Copyright Year	2008
Description	Author affiliation: TechLead Corp., Portland, OR, USA (Bauer, C.E.; Neuhaus, H.J.)
Abstract	Many alternative technologies compete in the 3D packaging, interconnection and assembly of semiconductors. Each competitor claims performance and cost advantages, however yield effects intrinsic to emerging technologies make accurate estimation of manufacturability and cost difficult due to the lack of technology specific data. Changes to materials, equipment, suppliers, customers, as well as levels of technical risk and work-in-progress inventory further exacerbate the problem. The authors present a generalized methodology to assess the opportunity cost associated with emerging 3D packaging approaches. This includes quantitative assessment of manufacturability and yielded cost, even where limited manufacturing yield data exists, in combination with the quantification of various market and logistics cost components. The methodology applies detailed process descriptions to accurately predict practical manufacturing costs. First-principle calculations based on product geometry, process complexity, and relevant known processes then predict yield effects at the unit operation level. Next the authors quantitatively model the additional opportunity cost implications of manufacturing logistics, inventory management and time to market. Further benefit results from using the opportunity cost model to optimize the design and process for manufacturing cost minimization as well as to take advantage of inventory and time to market enhancements to maximize design advancement flexibility and financial leverage including management of margin stacking where compounding of margins from one level in the supply chain to the next frequently results in excessive final cost to the OEM and ultimately the end user community.
Starting Page	338
Ending Page	343
File Size	3555652
Page Count	6
File Format	PDF
ISBN	9781424421176
DOI	10.1109/EPTC.2008.4763457
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Packaging machines Cost function Semiconductor device packaging Logistics Manufacturing processes Virtual manufacturing Inventory management Time to market Assembly Yield estimation
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in