NDLI: Development of Novel Dicing Process by Anisotropic Wet Etching with Convex Corner Compensation

Content Provider	IEEE Xplore Digital Library
Author	Lam, J.K.S. Lee, S.W.R.
Copyright Year	2008
Description	Author affiliation: Electron. Packaging Lab., Hong Kong Univ. of Sci. & Technol., Hong Kong, China (Lam, J.K.S.; Lee, S.W.R.)
Abstract	In the present study, chemical dicing methods were developed as an alternative solution for thin silicon chips separation. Dicing streets were fabricated by wet and dry etching. The dry etching approach is reliable but also an expensive process. On the other hand, the wet etching approach offers a faster and low-cost process compared with the dry etching approach. However, serious undercutting usually occurs and damages the chip corners. During the course of the present study, a convex corner compensation scheme was implemented to resolve the undercutting problem. A parametric study was performed with various kinds of redundant [1 1 0]-oriented beam patterns at the corners of intersections. Experimental results showed that relatively sharp corners could be achieved with certain compensation patterns. A relation between the compensation pattern and the etched depth was established. The experimental result of the wet etching approach will be discussed in detail in this paper.
Starting Page	161
Ending Page	166
File Size	5692480
Page Count	6
File Format	PDF
ISBN	9781424421176
DOI	10.1109/EPTC.2008.4763428
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-09
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Anisotropic magnetoresistance Wet etching Dry etching Blades Electronics packaging Chemical technology Chemical processes Parametric study Silicon compounds Laboratories
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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