NDLI: Crucial processing steps for microcrystalline silicon bottom cells

Content Provider	IEEE Xplore Digital Library
Author	Kondo, M. Matsui, T. Nasuno, Y. Niikura, C. Fujibayashi, T. Sato, A. Matsuda, A. Fujiwara, H.
Copyright Year	2005
Description	Author affiliation: Res. Center for Photovoltaics, Nat. Inst. of Adv. Ind. Sci. & Technol., Ibaraki, Japan (Kondo, M.; Matsui, T.; Nasuno, Y.; Niikura, C.; Fujibayashi, T.; Sato, A.; Matsuda, A.; Fujiwara, H.)
Abstract	In the device processing of microcrystalline silicon bottom cells, a variety of processing steps determining not only the material properties but also the interface properties should be taken into account for higher efficiencies. In particular, since microcrystalline silicon is sensitive to impurity incorporation and its variation of the microstructure, processing window can be much narrower than for amorphous silicon based devices. We have found the advantage of the low processing temperature to overcome the oxygen contamination effects and the boron-induced phenomena. We have found that another important factor to influence the device performance particularly under the high rate deposition conditions is the combination of the high deposition pressure and silane depletion conditions. The advantage of the high-pressure depletion technique is discussed in terms of plasma physics and chemistry and its influence on the material properties. Finally, the optical design of the tandem cell is briefly discussed.
Sponsorship	IEEE Electron Devices Soc. (USA)
Starting Page	1377
Ending Page	1382
File Size	875080
Page Count	6
File Format	PDF
ISBN	0780387074
ISSN	01608371
DOI	10.1109/PVSC.2005.1488397
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-01-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Material properties Plasma chemistry Impurities Microstructure Amorphous silicon Plasma temperature Temperature sensors Contamination Plasma properties Plasma devices
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Control and Systems Engineering Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in